From patchwork Wed Dec 3 20:47:47 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Monjalon X-Patchwork-Id: 1746 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 29BE7803D; Wed, 3 Dec 2014 21:49:03 +0100 (CET) Received: from mail-wi0-f180.google.com (mail-wi0-f180.google.com [209.85.212.180]) by dpdk.org (Postfix) with ESMTP id F37F6559C for ; Wed, 3 Dec 2014 21:49:00 +0100 (CET) Received: by mail-wi0-f180.google.com with SMTP id n3so25758531wiv.7 for ; Wed, 03 Dec 2014 12:49:00 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=CSp5GWtWkM0EdbDGUbroVvPm+YUvYbS1z/u7ndnUlMo=; b=FesX3PIQUb4hNLuppSZM0ogcQb45B7wVpaYpbNi0Bi/CKTr+tbio+dvIAqQt6Pt9lW M7O/MhvoyqFuPO9jPqhewn66swJNUYJOrtO7XP5Uvh2EDqNcSI87XTYXnHhHtVVadCST zJMLQRPsfT/2UTQnV9blmne95/g9crQJMi6VaY/L6kfxe75z3yWn0l0J8Zs6pho0b6LV kFQI3oHAFjPWInkp56rU//peqbFclKVd+5YkJTR0eFcIk2YD9rhsrE/6I4kv05wfDj8X 9KPIb4D944UXHCs/9d9aNzpd0BfY9GCeHmxaAUFpnKlJsl50vp/Mq8wNF18yzGH7Ufgv rPWA== X-Gm-Message-State: ALoCoQn+ju1acndetFo56lEJAXvjyoVoRNSh1nglLXWFUDkPvJfPypKSR/OuyWyuInt/rMK4OYIF X-Received: by 10.180.84.198 with SMTP id b6mr105069779wiz.41.1417639740869; Wed, 03 Dec 2014 12:49:00 -0800 (PST) Received: from XPS13.localdomain (188.20.90.92.rev.sfr.net. [92.90.20.188]) by mx.google.com with ESMTPSA id hz9sm37761878wjb.17.2014.12.03.12.48.55 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 03 Dec 2014 12:49:00 -0800 (PST) From: Thomas Monjalon To: dev@dpdk.org Date: Wed, 3 Dec 2014 21:47:47 +0100 Message-Id: <1417639668-23500-2-git-send-email-thomas.monjalon@6wind.com> X-Mailer: git-send-email 2.1.3 In-Reply-To: <1417639668-23500-1-git-send-email-thomas.monjalon@6wind.com> References: <283531301.lWbIahXLyM@xps13> <1417639668-23500-1-git-send-email-thomas.monjalon@6wind.com> Subject: [dpdk-dev] [PATCH 1/2] eal: detect endianness X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" There is no standard to check endianness. So we need to try different checks. Previous trials were done in testpmd (see commits 51f694dd40f56 and 64741f237cf29) without full success. This one is not guaranteed to work everywhere so it could evolve when exceptions are found. If endianness is not detected, there is a fallback on x86 to little endian. It could be forced before doing detection but it would add some arch-dependent code in the generic header. The option CONFIG_RTE_ARCH_BIG_ENDIAN introduced for IBM Power only (commit a982ec81d84d53) can be removed. A compile-time check is better. Signed-off-by: Thomas Monjalon Acked-by: Michael Qiu --- config/defconfig_ppc_64-power8-linuxapp-gcc | 1 - .../common/include/arch/ppc_64/rte_byteorder.h | 4 ++-- .../common/include/arch/x86/rte_byteorder.h | 4 ++++ .../common/include/generic/rte_byteorder.h | 28 ++++++++++++++++++++++ 4 files changed, 34 insertions(+), 3 deletions(-) diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc b/config/defconfig_ppc_64-power8-linuxapp-gcc index 48018c3..d97a885 100644 --- a/config/defconfig_ppc_64-power8-linuxapp-gcc +++ b/config/defconfig_ppc_64-power8-linuxapp-gcc @@ -34,7 +34,6 @@ CONFIG_RTE_MACHINE="power8" CONFIG_RTE_ARCH="ppc_64" CONFIG_RTE_ARCH_PPC_64=y -CONFIG_RTE_ARCH_BIG_ENDIAN=y CONFIG_RTE_ARCH_64=y CONFIG_RTE_TOOLCHAIN="gcc" diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_byteorder.h b/lib/librte_eal/common/include/arch/ppc_64/rte_byteorder.h index 1a89051..80436f2 100644 --- a/lib/librte_eal/common/include/arch/ppc_64/rte_byteorder.h +++ b/lib/librte_eal/common/include/arch/ppc_64/rte_byteorder.h @@ -105,7 +105,7 @@ static inline uint64_t rte_arch_bswap64(uint64_t _x) /* Power 8 have both little endian and big endian mode * Power 7 only support big endian */ -#ifndef RTE_ARCH_BIG_ENDIAN +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN #define rte_cpu_to_le_16(x) (x) #define rte_cpu_to_le_32(x) (x) @@ -123,7 +123,7 @@ static inline uint64_t rte_arch_bswap64(uint64_t _x) #define rte_be_to_cpu_32(x) rte_bswap32(x) #define rte_be_to_cpu_64(x) rte_bswap64(x) -#else +#else /* RTE_BIG_ENDIAN */ #define rte_cpu_to_le_16(x) rte_bswap16(x) #define rte_cpu_to_le_32(x) rte_bswap32(x) diff --git a/lib/librte_eal/common/include/arch/x86/rte_byteorder.h b/lib/librte_eal/common/include/arch/x86/rte_byteorder.h index 1aa6985..ffdb6ef 100644 --- a/lib/librte_eal/common/include/arch/x86/rte_byteorder.h +++ b/lib/librte_eal/common/include/arch/x86/rte_byteorder.h @@ -40,6 +40,10 @@ extern "C" { #include "generic/rte_byteorder.h" +#ifndef RTE_BYTE_ORDER +#define RTE_BYTE_ORDER RTE_LITTLE_ENDIAN +#endif + /* * An architecture-optimized byte swap for a 16-bit value. * diff --git a/lib/librte_eal/common/include/generic/rte_byteorder.h b/lib/librte_eal/common/include/generic/rte_byteorder.h index 9358136..ea23fdf 100644 --- a/lib/librte_eal/common/include/generic/rte_byteorder.h +++ b/lib/librte_eal/common/include/generic/rte_byteorder.h @@ -44,6 +44,34 @@ */ #include +#ifdef RTE_EXEC_ENV_BSDAPP +#include +#else +#include +#endif + +/* + * Compile-time endianness detection + */ +#define RTE_BIG_ENDIAN 1 +#define RTE_LITTLE_ENDIAN 2 +#if defined __BYTE_ORDER +#if __BYTE_ORDER == __BIG_ENDIAN +#define RTE_BYTE_ORDER RTE_BIG_ENDIAN +#elif __BYTE_ORDER == __LITTLE_ENDIAN +#define RTE_BYTE_ORDER RTE_LITTLE_ENDIAN +#endif /* __BYTE_ORDER */ +#elif defined __BYTE_ORDER__ +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ +#define RTE_BYTE_ORDER RTE_BIG_ENDIAN +#elif __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ +#define RTE_BYTE_ORDER RTE_LITTLE_ENDIAN +#endif /* __BYTE_ORDER__ */ +#elif defined __BIG_ENDIAN__ +#define RTE_BYTE_ORDER RTE_BIG_ENDIAN +#elif defined __LITTLE_ENDIAN__ +#define RTE_BYTE_ORDER RTE_LITTLE_ENDIAN +#endif /* * An internal function to swap bytes in a 16-bit value.