From patchwork Sun Nov 16 17:59:19 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yerden Zhumabekov X-Patchwork-Id: 1313 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 5167E7FE5; Sun, 16 Nov 2014 18:48:51 +0100 (CET) Received: from mgw.gov.kz (mgw.gov.kz [89.218.88.242]) by dpdk.org (Postfix) with ESMTP id 07B687FB4 for ; Sun, 16 Nov 2014 18:48:47 +0100 (CET) Received: from mgw.gov.kz (mx.ctsat.kz [178.89.4.95]) by mgw.gov.kz with ESMTP id sAGHww2p029789-sAGHww2r029789 (version=TLSv1.0 cipher=AES128-SHA bits=128 verify=NO); Sun, 16 Nov 2014 23:58:58 +0600 Received: from EXCASHUB2.rgp.local (192.168.40.53) by EdgeForefront.rgp.local (192.168.40.59) with Microsoft SMTP Server (TLS) id 14.2.247.3; Sun, 16 Nov 2014 23:58:48 +0600 Received: from r220.rgp.local (192.168.59.10) by excashub2.rgp.local (192.168.40.48) with Microsoft SMTP Server (TLS) id 14.2.247.3; Sun, 16 Nov 2014 23:59:03 +0600 From: Yerden Zhumabekov To: Date: Sun, 16 Nov 2014 23:59:19 +0600 Message-ID: <1416160760-16087-4-git-send-email-e_zhumabekov@sts.kz> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1409724351-23786-1-git-send-email-e_zhumabekov@sts.kz> References: <1409724351-23786-1-git-send-email-e_zhumabekov@sts.kz> MIME-Version: 1.0 X-Originating-IP: [192.168.59.10] X-FEAS-SYSTEM-WL: e_zhumabekov@sts.kz Subject: [dpdk-dev] [PATCH v2 3/4] hash: add fallback to software CRC32 implementation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Initially, SSE4.2 support is detected via CPUID instruction. Added rte_hash_crc_set_alg() function to detect and set CRC32 implementation if necessary. SSE4.2 is allowed by default. If it's not available, fall back to sw implementation. Signed-off-by: Yerden Zhumabekov --- lib/librte_hash/rte_hash_crc.h | 60 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 58 insertions(+), 2 deletions(-) diff --git a/lib/librte_hash/rte_hash_crc.h b/lib/librte_hash/rte_hash_crc.h index 74e2d92..178b162 100644 --- a/lib/librte_hash/rte_hash_crc.h +++ b/lib/librte_hash/rte_hash_crc.h @@ -45,7 +45,11 @@ extern "C" { #endif #include +#ifdef RTE_MACHINE_CPUFLAG_SSE4_2 #include +#endif +#include +#include /* Lookup table for software implementation of CRC32C */ static const uint32_t crc32c_table[256] = { @@ -152,8 +156,42 @@ crc32c_2words(uint64_t data, uint32_t init_val) return init_val; } +enum crc32_alg_t { + CRC32_SW = 0, + CRC32_SSE42, + CRC32_AUTODETECT +}; + +/* Default algorithm is left for autodetection, + * it is detected on first run of hash function + */ +static enum crc32_alg_t crc32_alg = CRC32_AUTODETECT; + +/** + * Allow or disallow use of SSE4.2 instrinsics for CRC32 hash + * hash calculation. + * + * @param flag + * unsigned integer flag + * - (CRC32_SW) Don't use SSE4.2 intrinsics + * - (CRC32_SSE42) Use SSE4.2 intrinsics if available, set by default + */ +static inline void +rte_hash_crc_set_alg(enum crc32_alg_t alg) +{ + int sse42_supp = rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_2); + enum crc32_alg_t alg_supp = sse42_supp ? CRC32_SSE42 : CRC32_SW; + + if (alg == CRC32_SSE42) + crc32_alg = alg_supp; + else + crc32_alg = CRC32_SW; +} + /** * Use single crc32 instruction to perform a hash on a 4 byte value. + * Fall back to software crc32 implementation in case SSE4.2 is + * not supported * * @param data * Data to perform hash on. @@ -165,11 +203,21 @@ crc32c_2words(uint64_t data, uint32_t init_val) static inline uint32_t rte_hash_crc_4byte(uint32_t data, uint32_t init_val) { - return _mm_crc32_u32(init_val, data); + if (unlikely(crc32_alg == CRC32_AUTODETECT)) + rte_hash_crc_set_alg(CRC32_SSE42); + +#ifdef RTE_MACHINE_CPUFLAG_SSE4_2 + if (likely(crc32_alg == CRC32_SSE42)) + return _mm_crc32_u32(init_val, data); +#endif + + return crc32c_1word(data, init_val); } /** * Use single crc32 instruction to perform a hash on a 8 byte value. + * Fall back to software crc32 implementation in case SSE4.2 is + * not supported * * @param data * Data to perform hash on. @@ -181,7 +229,15 @@ rte_hash_crc_4byte(uint32_t data, uint32_t init_val) static inline uint32_t rte_hash_crc_8byte(uint64_t data, uint32_t init_val) { - return _mm_crc32_u64(init_val, data); + if (unlikely(crc32_alg == CRC32_AUTODETECT)) + rte_hash_crc_set_alg(CRC32_SSE42); + +#ifdef RTE_MACHINE_CPUFLAG_SSE4_2 + if (likely(crc32_alg == CRC32_SSE42)) + return _mm_crc32_u64(init_val, data); +#endif + + return crc32c_2words(data, init_val); } /**