diff mbox

[dpdk-dev,2/4] doc: Corrected info for tx_checksum set mask function, in testpmd UG

Message ID 1416078796-689-3-git-send-email-pablo.de.lara.guarch@intel.com (mailing list archive)
State Superseded, archived
Headers show

Commit Message

De Lara Guarch, Pablo Nov. 15, 2014, 7:13 p.m. UTC
tx_checksum set mask function now allows 4 extra bits in the mask
for TX checksum offload

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
---
 doc/guides/testpmd_app_ug/testpmd_funcs.rst |   10 +++++++++-
 1 files changed, 9 insertions(+), 1 deletions(-)

Comments

Olivier Matz Nov. 17, 2014, 10:39 a.m. UTC | #1
Hi Pablo,

On 11/15/2014 08:13 PM, Pablo de Lara wrote:
> tx_checksum set mask function now allows 4 extra bits in the mask
> for TX checksum offload
> 
> Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
> ---
>  doc/guides/testpmd_app_ug/testpmd_funcs.rst |   10 +++++++++-
>  1 files changed, 9 insertions(+), 1 deletions(-)

A patch reworking the csumonly API is pending:
http://dpdk.org/ml/archives/dev/2014-November/008188.html

I don't know if it will be accepted, but just to mention that
these 2 patches will conflict in this case.

Regards,
Olivier
De Lara Guarch, Pablo Nov. 17, 2014, 10:47 a.m. UTC | #2
Hi Olivier,

> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Olivier MATZ
> Sent: Monday, November 17, 2014 10:39 AM
> To: De Lara Guarch, Pablo; dev@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH 2/4] doc: Corrected info for tx_checksum set
> mask function, in testpmd UG
> 
> Hi Pablo,
> 
> On 11/15/2014 08:13 PM, Pablo de Lara wrote:
> > tx_checksum set mask function now allows 4 extra bits in the mask
> > for TX checksum offload
> >
> > Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
> > ---
> >  doc/guides/testpmd_app_ug/testpmd_funcs.rst |   10 +++++++++-
> >  1 files changed, 9 insertions(+), 1 deletions(-)
> 
> A patch reworking the csumonly API is pending:
> http://dpdk.org/ml/archives/dev/2014-November/008188.html
> 
> I don't know if it will be accepted, but just to mention that
> these 2 patches will conflict in this case.

Thanks for spotting it! I guess that at this point, all we can do is wait.
If you patch gets applied before mine, I will send a v2 with the changes.
If it gets applied after, then I will send another patch to fix it.

Pablo
> 
> Regards,
> Olivier
Thomas Monjalon Nov. 26, 2014, 12:41 p.m. UTC | #3
Hi Pablo,

2014-11-17 10:47, De Lara Guarch, Pablo:
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Olivier MATZ
> > On 11/15/2014 08:13 PM, Pablo de Lara wrote:
> > > tx_checksum set mask function now allows 4 extra bits in the mask
> > > for TX checksum offload
> > >
> > > Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
> > > ---
> > >  doc/guides/testpmd_app_ug/testpmd_funcs.rst |   10 +++++++++-
> > >  1 files changed, 9 insertions(+), 1 deletions(-)
> > 
> > A patch reworking the csumonly API is pending:
> > http://dpdk.org/ml/archives/dev/2014-November/008188.html
> > 
> > I don't know if it will be accepted, but just to mention that
> > these 2 patches will conflict in this case.
> 
> Thanks for spotting it! I guess that at this point, all we can do is wait.
> If you patch gets applied before mine, I will send a v2 with the changes.
> If it gets applied after, then I will send another patch to fix it.

Oliver will send a v4 of his TSO patchset which should be applied shortly.
Please could you adjust the documentation and make a v2?

Bernard, we have to wait for this change.

Thanks to all
De Lara Guarch, Pablo Nov. 26, 2014, 1:26 p.m. UTC | #4
> -----Original Message-----
> From: Thomas Monjalon [mailto:thomas.monjalon@6wind.com]
> Sent: Wednesday, November 26, 2014 12:41 PM
> To: De Lara Guarch, Pablo
> Cc: dev@dpdk.org; Olivier MATZ; Iremonger, Bernard
> Subject: Re: [dpdk-dev] [PATCH 2/4] doc: Corrected info for tx_checksum set
> mask function, in testpmd UG
> 
> Hi Pablo,
> 
> 2014-11-17 10:47, De Lara Guarch, Pablo:
> > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Olivier MATZ
> > > On 11/15/2014 08:13 PM, Pablo de Lara wrote:
> > > > tx_checksum set mask function now allows 4 extra bits in the mask
> > > > for TX checksum offload
> > > >
> > > > Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
> > > > ---
> > > >  doc/guides/testpmd_app_ug/testpmd_funcs.rst |   10 +++++++++-
> > > >  1 files changed, 9 insertions(+), 1 deletions(-)
> > >
> > > A patch reworking the csumonly API is pending:
> > > http://dpdk.org/ml/archives/dev/2014-November/008188.html
> > >
> > > I don't know if it will be accepted, but just to mention that
> > > these 2 patches will conflict in this case.
> >
> > Thanks for spotting it! I guess that at this point, all we can do is wait.
> > If you patch gets applied before mine, I will send a v2 with the changes.
> > If it gets applied after, then I will send another patch to fix it.
> 
> Oliver will send a v4 of his TSO patchset which should be applied shortly.
> Please could you adjust the documentation and make a v2?
> 
> Bernard, we have to wait for this change.

Sure, no problem.
> 
> Thanks to all
> --
> Thomas
diff mbox

Patch

diff --git a/doc/guides/testpmd_app_ug/testpmd_funcs.rst b/doc/guides/testpmd_app_ug/testpmd_funcs.rst
index a2b76d7..3b62118 100644
--- a/doc/guides/testpmd_app_ug/testpmd_funcs.rst
+++ b/doc/guides/testpmd_app_ug/testpmd_funcs.rst
@@ -510,7 +510,7 @@  tx_vlan reset (port_id)
 tx_checksum set mask
 ~~~~~~~~~~~~~~~~~~~~
 
-Enable hardware insertion of checksum offload with a 4-bit mask, 0x0 - 0xF, in packets sent on a port:
+Enable hardware insertion of checksum offload with a 8-bit mask, 0x0 - 0xFF, in packets sent on a port:
 
 tx_checksum set (mask) (port_id)
 
@@ -524,6 +524,14 @@  bit 2 - if set insert tcp checksum offload
 
 bit 3 - if set insert sctp checksum offload
 
+bit 4 - if set insert inner ip checksum offload
+
+bit 5 - if set insert inner udp checksum offload
+
+bit 6 - if set insert inner tcp checksum offload
+
+bit 7 - if set insert inner sctp checksum offload
+
 .. note::
 
     Check the NIC Datasheet for hardware limits.