diff mbox

[dpdk-dev,2/2] i40e: fix of configuring inside NIC RX interrupt

Message ID 1414554168-5117-3-git-send-email-helin.zhang@intel.com (mailing list archive)
State Accepted, archived
Headers show

Commit Message

Helin Zhang Oct. 29, 2014, 3:42 a.m. UTC
Inside NIC RX interrupt is needed for single RX descriptor
write back. The fix is to correct the wrong configuration
of register 'I40E_QINT_RQCTL'.
Note that interrupt will be inside NIC only, that means it
will never be reported outside NIC hardware.

Signed-off-by: Helin Zhang <helin.zhang@intel.com>
---
 lib/librte_pmd_i40e/i40e_ethdev.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)
diff mbox

Patch

diff --git a/lib/librte_pmd_i40e/i40e_ethdev.c b/lib/librte_pmd_i40e/i40e_ethdev.c
index 20c99a4..4614c3d 100644
--- a/lib/librte_pmd_i40e/i40e_ethdev.c
+++ b/lib/librte_pmd_i40e/i40e_ethdev.c
@@ -580,8 +580,6 @@  i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi)
 	uint32_t val;
 	struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
 	uint16_t msix_vect = vsi->msix_intr;
-	uint16_t interval =
-		i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL);
 	int i;
 
 	for (i = 0; i < vsi->nb_qps; i++)
@@ -590,7 +588,7 @@  i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi)
 	/* Bind all RX queues to allocated MSIX interrupt */
 	for (i = 0; i < vsi->nb_qps; i++) {
 		val = (msix_vect << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
-			(interval << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
+			I40E_QINT_RQCTL_ITR_INDX_MASK |
 			((vsi->base_queue + i + 1) <<
 			I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
 			(0 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
@@ -603,6 +601,9 @@  i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi)
 
 	/* Write first RX queue to Link list register as the head element */
 	if (vsi->type != I40E_VSI_SRIOV) {
+		uint16_t interval =
+			i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL);
+
 		I40E_WRITE_REG(hw, I40E_PFINT_LNKLSTN(msix_vect - 1),
 						(vsi->base_queue <<
 				I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT) |