From patchwork Tue Apr 17 02:48:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yongseok Koh X-Patchwork-Id: 38273 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 52E65C1EE; Tue, 17 Apr 2018 04:48:51 +0200 (CEST) Received: from EUR02-HE1-obe.outbound.protection.outlook.com (mail-eopbgr10045.outbound.protection.outlook.com [40.107.1.45]) by dpdk.org (Postfix) with ESMTP id 85AEFBD2E for ; Tue, 17 Apr 2018 04:48:50 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Mellanox.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=agoga6HA0SC76vw1Lk4cW8hy0oiPm2NexpxDZUxuzY4=; b=KxgrQrE39TYPmuUYW6bgKpUG4GYHeKAr5tiy+AWrK7G5CB4NCDomKvN1kmTpnRKisbTJC3xNr628NbR7QibQFoAp7gEMSWD8DDrPeJ7/VyduShKIK3SjA1DjxVD9PiwEQZ4MIfRZ4D3D7PrgmUsDcFnBr63Eeg7HS74IXe71xNE= Received: from VI1PR0501MB2045.eurprd05.prod.outlook.com (10.167.195.147) by VI1PR0501MB2717.eurprd05.prod.outlook.com (10.172.15.142) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.675.14; Tue, 17 Apr 2018 02:48:48 +0000 Received: from VI1PR0501MB2045.eurprd05.prod.outlook.com ([fe80::5453:e317:6563:11b3]) by VI1PR0501MB2045.eurprd05.prod.outlook.com ([fe80::5453:e317:6563:11b3%13]) with mapi id 15.20.0675.015; Tue, 17 Apr 2018 02:48:48 +0000 From: Yongseok Koh To: Anatoly Burakov CC: "dev@dpdk.org" , Adrien Mazarguil , =?iso-8859-1?q?N=E9lio?= =?iso-8859-1?q?_Laranjeiro?= , "keith.wiles@intel.com" , "jianfeng.tan@intel.com" , "andras.kovacs@ericsson.com" , "laszlo.vadkeri@ericsson.com" , "benjamin.walker@intel.com" , "bruce.richardson@intel.com" , Thomas Monjalon , "konstantin.ananyev@intel.com" , "kuralamudhan.ramakrishnan@intel.com" , "louise.m.daly@intel.com" , "pepperjo@japf.ch" , "jerin.jacob@caviumnetworks.com" , "hemant.agrawal@nxp.com" , "olivier.matz@6wind.com" , "shreyansh.jain@nxp.com" , "gowrishankar.m@linux.vnet.ibm.com" Thread-Topic: [PATCH v6 44/70] net/mlx5: use virt2memseg instead of iteration Thread-Index: AQHT0ZD126kuWuQvE02f0NgPimU6ZaQEShKA Date: Tue, 17 Apr 2018 02:48:47 +0000 Message-ID: <0E4E13D3-8842-444E-BEF0-0D76B2547A57@mellanox.com> References: In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=yskoh@mellanox.com; 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> - const struct rte_memseg *ms = rte_eal_get_physmem_layout(); > + const struct rte_memseg *ms; > uintptr_t start; > uintptr_t end; > - unsigned int i; > struct mlx5_mr *mr; > > mr = rte_zmalloc_socket(__func__, sizeof(*mr), 0, mp->socket_id); > @@ -261,17 +260,15 @@ mlx5_mr_new(struct rte_eth_dev *dev, struct rte_mempool *mp) > /* Save original addresses for exact MR lookup. */ > mr->start = start; > mr->end = end; > + > /* Round start and end to page boundary if found in memory segments. */ > - for (i = 0; (i < RTE_MAX_MEMSEG) && (ms[i].addr != NULL); ++i) { > - uintptr_t addr = (uintptr_t)ms[i].addr; > - size_t len = ms[i].len; > - unsigned int align = ms[i].hugepage_sz; > + ms = rte_mem_virt2memseg((void *)start); > + if (ms != NULL) > + start = RTE_ALIGN_FLOOR(start, ms->hugepage_sz); > + ms = rte_mem_virt2memseg((void *)end); > + if (ms != NULL) > + end = RTE_ALIGN_CEIL(end, ms->hugepage_sz); It is buggy. The memory region is [start, end), so if the memseg of 'end' isn't allocated yet, the returned ms will have zero entries and this will make 'end' zero. Instead, the following will be fine. Same for mlx4. Please fix both mlx5 and mlx4 so that we can verify the new design. However, this code block will be removed eventually. I've done a patchset to accommodate your memory hotplug design and I'll send it out soon. Thanks in advance. Yongseok > - if ((start > addr) && (start < addr + len)) > - start = RTE_ALIGN_FLOOR(start, align); > - if ((end > addr) && (end < addr + len)) > - end = RTE_ALIGN_CEIL(end, align); > - } > DRV_LOG(DEBUG, > "port %u mempool %p using start=%p end=%p size=%zu for memory" > " region", > -- > 2.7.4 diff --git a/drivers/net/mlx5/mlx5_mr.c b/drivers/net/mlx5/mlx5_mr.c index fdf7b3e88..39bbe2481 100644 --- a/drivers/net/mlx5/mlx5_mr.c +++ b/drivers/net/mlx5/mlx5_mr.c @@ -265,9 +265,7 @@ mlx5_mr_new(struct rte_eth_dev *dev, struct rte_mempool *mp) ms = rte_mem_virt2memseg((void *)start, NULL); if (ms != NULL) start = RTE_ALIGN_FLOOR(start, ms->hugepage_sz); - ms = rte_mem_virt2memseg((void *)end, NULL); - if (ms != NULL) - end = RTE_ALIGN_CEIL(end, ms->hugepage_sz); + end = RTE_ALIGN_CEIL(end, ms->hugepage_sz); DRV_LOG(DEBUG, "port %u mempool %p using start=%p end=%p size=%zu for memory"