[v2] net/mlx5: fix init with zero Rx queues

Message ID 02664e0b50e375e0b0d4ee05c8ad554295b0ccde.1556794185.git.dekelp@mellanox.com (mailing list archive)
State Superseded, archived
Delegated to: Shahaf Shuler
Headers
Series [v2] net/mlx5: fix init with zero Rx queues |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation fail apply issues

Commit Message

Dekel Peled May 2, 2019, 10:49 a.m. UTC
  Recent patch [1] added, at the end of mlx5_dev_configure(), a call to
mlx5_proc_priv_init(), initializing process_private data of eth_dev.
This call is not reached if PMD is started with zero Rx queues.
In this case mlx5_dev_configure() returns earlier due to the check:
	if (rxqs_n == priv->rxqs_n)
		return 0;
In such a scenario, later references to uninitialized process_private
data will result in segmentation fault.
For example see in function txq_uar_init().

This patch changes the check logic. The following code is executed
if (rxqs_n != priv->rxqs_n), and skipped otherwise.
Function mlx5_proc_priv_init() is always invoked, to ensure
process_private data is initialized.

[1] http://patches.dpdk.org/patch/52629/

Fixes: 120dc4a7dcd3 ("net/mlx5: remove device register remap")
Cc: yskoh@mellanox.com

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>

---
v2: Update logic after code review.
---
---
 drivers/net/mlx5/mlx5_ethdev.c | 58 ++++++++++++++++++++++--------------------
 1 file changed, 31 insertions(+), 27 deletions(-)
  

Patch

diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c
index 35d276d..e898c2c 100644
--- a/drivers/net/mlx5/mlx5_ethdev.c
+++ b/drivers/net/mlx5/mlx5_ethdev.c
@@ -435,33 +435,37 @@  struct ethtool_link_settings {
 		rte_errno = EINVAL;
 		return -rte_errno;
 	}
-	if (rxqs_n == priv->rxqs_n)
-		return 0;
-	DRV_LOG(INFO, "port %u Rx queues number update: %u -> %u",
-		dev->data->port_id, priv->rxqs_n, rxqs_n);
-	priv->rxqs_n = rxqs_n;
-	/*
-	 * WHen using LRO, MPRQ is implicitly enabled.
-	 * Adjust threshold value to ensure MPRQ can be enabled.
-	 */
-	if (lro_on && priv->config.mprq.min_rxqs_num > priv->rxqs_n)
-		priv->config.mprq.min_rxqs_num = priv->rxqs_n;
-	/* If the requested number of RX queues is not a power of two, use the
-	 * maximum indirection table size for better balancing.
-	 * The result is always rounded to the next power of two. */
-	reta_idx_n = (1 << log2above((rxqs_n & (rxqs_n - 1)) ?
-				     priv->config.ind_table_max_size :
-				     rxqs_n));
-	ret = mlx5_rss_reta_index_resize(dev, reta_idx_n);
-	if (ret)
-		return ret;
-	/* When the number of RX queues is not a power of two, the remaining
-	 * table entries are padded with reused WQs and hashes are not spread
-	 * uniformly. */
-	for (i = 0, j = 0; (i != reta_idx_n); ++i) {
-		(*priv->reta_idx)[i] = j;
-		if (++j == rxqs_n)
-			j = 0;
+	if (rxqs_n != priv->rxqs_n) {
+		DRV_LOG(INFO, "port %u Rx queues number update: %u -> %u",
+			dev->data->port_id, priv->rxqs_n, rxqs_n);
+		priv->rxqs_n = rxqs_n;
+		/*
+		 * WHen using LRO, MPRQ is implicitly enabled.
+		 * Adjust threshold value to ensure MPRQ can be enabled.
+		 */
+		if (lro_on && priv->config.mprq.min_rxqs_num > priv->rxqs_n)
+			priv->config.mprq.min_rxqs_num = priv->rxqs_n;
+		/*
+		 * If the requested number of RX queues is not a power of two,
+		 * use the maximum indirection table size for better balancing.
+		 * The result is always rounded to the next power of two.
+		 */
+		reta_idx_n = (1 << log2above((rxqs_n & (rxqs_n - 1)) ?
+					     priv->config.ind_table_max_size :
+					     rxqs_n));
+		ret = mlx5_rss_reta_index_resize(dev, reta_idx_n);
+		if (ret)
+			return ret;
+		/*
+		 * When the number of RX queues is not a power of two, the
+		 * remaining table entries are padded with reused WQs and
+		 * hashes are not spread uniformly.
+		 */
+		for (i = 0, j = 0; (i != reta_idx_n); ++i) {
+			(*priv->reta_idx)[i] = j;
+			if (++j == rxqs_n)
+				j = 0;
+		}
 	}
 	ret = mlx5_proc_priv_init(dev);
 	if (ret)