Message ID | 20230915100047.90153-1-yuying.zhang@intel.com (mailing list archive) |
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Headers |
Return-Path: <dev-bounces@dpdk.org> X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4A492425A3; Fri, 15 Sep 2023 11:01:51 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D878340647; Fri, 15 Sep 2023 11:01:50 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.120]) by mails.dpdk.org (Postfix) with ESMTP id 58B764029E for <dev@dpdk.org>; Fri, 15 Sep 2023 11:01:49 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1694768509; x=1726304509; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=z9r9jcae+3ZirOgo5iEEcEOnnAw3w9FNBXpMf1/ms88=; b=KhVPD8SdHMV6dzjpHdSKAhn8kjH4iHfeDtPy2or37afEJsH8OMg0/6Fn ZyMvom5nYln6oPFXG0UF8Csx1aO89oajn04+ex3SHKxGHdjuAXXmkJEFt jeiXUtC7TpD7rqZRl42FDEGXxoZ/Y7C5hSYI7zESdPB7mtfycz5K8YQm8 g2XE4Z3wFsiz3/JGF7ObO6fu3SYcsd78hEgynFEcql2AmbCir1zkEFWBJ jouavQW01pFf04B6SkZIpsFvE469sLZwZZSK0qFoOYyHd5+bdq4nw6Vlg qLbZGwR9liUSlYm5bWX5S9hl/PPBxpNnG8llw9vCIktfbJFpun4ai/PhB g==; X-IronPort-AV: E=McAfee;i="6600,9927,10833"; a="378117387" X-IronPort-AV: E=Sophos;i="6.02,148,1688454000"; d="scan'208";a="378117387" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Sep 2023 02:01:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10833"; a="868630550" X-IronPort-AV: E=Sophos;i="6.02,148,1688454000"; d="scan'208";a="868630550" Received: from dpdk-pengyuan-mev.sh.intel.com ([10.67.119.128]) by orsmga004.jf.intel.com with ESMTP; 15 Sep 2023 02:01:46 -0700 From: "Zhang, Yuying" <yuying.zhang@intel.com> To: yuying.zhang@intel.com, dev@dpdk.org, qi.z.zhang@intel.com, beilei.xing@intel.com, jingjing.wu@intel.com Cc: mingxia.liu@intel.com Subject: [PATCH v5 0/9] add rte flow support for cpfl Date: Fri, 15 Sep 2023 10:00:38 +0000 Message-Id: <20230915100047.90153-1-yuying.zhang@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230906093407.3635038-1-wenjing.qiao@intel.com> References: <20230906093407.3635038-1-wenjing.qiao@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions <dev.dpdk.org> List-Unsubscribe: <https://mails.dpdk.org/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://mails.dpdk.org/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <https://mails.dpdk.org/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> Errors-To: dev-bounces@dpdk.org |
Series |
add rte flow support for cpfl
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Message
Zhang, Yuying
Sept. 15, 2023, 10 a.m. UTC
From: Yuying Zhang <yuying.zhang@intel.com>
This patchset add rte flow support for cpfl driver.
It depends on the following patch set:
http://patchwork.dpdk.org/project/dpdk/cover/20230912173039.1612287-1-beilei.xing@intel.com/
Wenjing Qiao (2):
net/cpfl: add json parser for rte flow pattern rules
net/cpfl: add mod rule parser support for rte flow
Yuying Zhang (7):
net/cpfl: set up rte flow skeleton
net/cpfl: add FXP low level implementation
net/cpfl: add fxp rule module
net/cpfl: add fxp flow engine
net/cpfl: add flow support for representor
app/test-pmd: refine encap content
net/cpfl: fix incorrect status calculation
app/test-pmd/cmdline_flow.c | 12 +-
doc/guides/nics/cpfl.rst | 43 +
doc/guides/rel_notes/release_23_11.rst | 1 +
drivers/net/cpfl/cpfl_actions.h | 858 +++++++++++
drivers/net/cpfl/cpfl_controlq.c | 803 ++++++++++
drivers/net/cpfl/cpfl_controlq.h | 75 +
drivers/net/cpfl/cpfl_ethdev.c | 394 ++++-
drivers/net/cpfl/cpfl_ethdev.h | 128 ++
drivers/net/cpfl/cpfl_flow.c | 339 +++++
drivers/net/cpfl/cpfl_flow.h | 85 ++
drivers/net/cpfl/cpfl_flow_engine_fxp.c | 667 +++++++++
drivers/net/cpfl/cpfl_flow_parser.c | 1834 +++++++++++++++++++++++
drivers/net/cpfl/cpfl_flow_parser.h | 267 ++++
drivers/net/cpfl/cpfl_fxp_rule.c | 296 ++++
drivers/net/cpfl/cpfl_fxp_rule.h | 68 +
drivers/net/cpfl/cpfl_representor.c | 29 +
drivers/net/cpfl/cpfl_rules.c | 126 ++
drivers/net/cpfl/cpfl_rules.h | 306 ++++
drivers/net/cpfl/cpfl_vchnl.c | 144 ++
drivers/net/cpfl/meson.build | 18 +
20 files changed, 6489 insertions(+), 4 deletions(-)
create mode 100644 drivers/net/cpfl/cpfl_actions.h
create mode 100644 drivers/net/cpfl/cpfl_controlq.c
create mode 100644 drivers/net/cpfl/cpfl_controlq.h
create mode 100644 drivers/net/cpfl/cpfl_flow.c
create mode 100644 drivers/net/cpfl/cpfl_flow.h
create mode 100644 drivers/net/cpfl/cpfl_flow_engine_fxp.c
create mode 100644 drivers/net/cpfl/cpfl_flow_parser.c
create mode 100644 drivers/net/cpfl/cpfl_flow_parser.h
create mode 100644 drivers/net/cpfl/cpfl_fxp_rule.c
create mode 100644 drivers/net/cpfl/cpfl_fxp_rule.h
create mode 100644 drivers/net/cpfl/cpfl_rules.c
create mode 100644 drivers/net/cpfl/cpfl_rules.h