mbox series

[0/2] i40e Rx descriptor loads ordering

Message ID 20210906033201.1789796-1-ruifeng.wang@arm.com (mailing list archive)
Headers
Series i40e Rx descriptor loads ordering |

Message

Ruifeng Wang Sept. 6, 2021, 3:31 a.m. UTC 
  On Rx path, NIC fills Rx descriptor with data pertains to received packet. 

A single descriptor consists of multiple words. Word1 has the bit that 
indicates readiness of descriptor for software to use. So word1 should
be loaded before other words. 

On architectures with weaker memory ordering, barrier is needed to ensure
the ordering of loads.

This patch set fixed the risk on both scalar path and aarch64 vector path.

Ruifeng Wang (2):
  net/i40e: fix risk in Rx descriptor read in NEON vector path
  net/i40e: fix risk in Rx descriptor read in scalar path

 drivers/net/i40e/i40e_rxtx.c          | 12 ++++++++++++
 drivers/net/i40e/i40e_rxtx_vec_neon.c |  8 ++++++++
 2 files changed, 20 insertions(+)