From patchwork Fri Apr 23 11:39:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Wang, Haiyue" X-Patchwork-Id: 92078 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6811CA0548; Fri, 23 Apr 2021 14:06:12 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1AFDF410EB; Fri, 23 Apr 2021 14:06:12 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mails.dpdk.org (Postfix) with ESMTP id 429374014F for ; Fri, 23 Apr 2021 14:06:10 +0200 (CEST) IronPort-SDR: 0YsxQRwRjsczI2sI9F9UoORJsrUI0k8lI2brWO9Wj53BJMFc0AkJ3Ti6xE9CTut/2efdIroIhq d1yJoQGjaOWQ== X-IronPort-AV: E=McAfee;i="6200,9189,9962"; a="183538008" X-IronPort-AV: E=Sophos;i="5.82,245,1613462400"; d="scan'208";a="183538008" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2021 05:06:08 -0700 IronPort-SDR: Hw9YSn7Xc9xQIIlE1qOPEszGbmerFckolgrwXjJvvNhBYJ2bh/qd2tTA9Omfn0nb145ht2ObZn 3v87490vt07g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,245,1613462400"; d="scan'208";a="428359933" Received: from npg-dpdk-haiyue-2.sh.intel.com ([10.67.119.63]) by orsmga008.jf.intel.com with ESMTP; 23 Apr 2021 05:06:07 -0700 From: Haiyue Wang To: dev@dpdk.org Cc: qi.z.zhang@intel.com, liang-min.wang@intel.com, Haiyue Wang Date: Fri, 23 Apr 2021 19:39:58 +0800 Message-Id: <20210423114001.174723-1-haiyue.wang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210421050243.130585-1-haiyue.wang@intel.com> References: <20210421050243.130585-1-haiyue.wang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 0/3] fix PF reset causes VF memory request failure X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" By triggerring the VF reset from PF reset, echo 1 > /sys/bus/pci/devices/PF-BDF/reset the PCI bus master bit will cleared on VF, so the VF needs to enable this bit before restart. This patch set adds the API to enable PCI bus master. v3: added the missed annotate symbol add time v2: rebase to new librte directory path. Haiyue Wang (3): bus/pci: enable PCI master in command register net/iavf: enable PCI bus master after reset net/i40e: enable PCI bus master after reset drivers/bus/pci/pci_common.c | 20 ++++++++++++++++++++ drivers/bus/pci/rte_bus_pci.h | 12 ++++++++++++ drivers/bus/pci/version.map | 3 +++ drivers/net/i40e/i40e_ethdev_vf.c | 7 ++++++- drivers/net/iavf/iavf_ethdev.c | 3 +++ lib/pci/rte_pci.h | 4 ++++ 6 files changed, 48 insertions(+), 1 deletion(-)