mbox series

[0/2] support GTP-U Tx offload on FVL and CVL

Message ID 20201125093214.14504-1-murphyx.yang@intel.com (mailing list archive)
Headers
Series support GTP-U Tx offload on FVL and CVL |

Message

Murphy Yang Nov. 25, 2020, 9:32 a.m. UTC 
  Support outer L3 and inner L3 + L4 Tx checksum offload for GTP-U packets
that contain extension header on FVL.
Support outer L3 + L4 and inner L3 + L4 Rx and Tx checksum offload for
GTP-U packets that contain extension header on CVL.

Murphy Yang (2):
  net/i40e: support GTP checksum offload
  app/testpmd: support GTP-U extension packet checksum offload

 app/test-pmd/csumonly.c      | 26 +++++++++++++++++++++++---
 drivers/net/i40e/i40e_rxtx.c |  1 +
 2 files changed, 24 insertions(+), 3 deletions(-)

Comments

Guo, Jia Dec. 2, 2020, 7:58 a.m. UTC | #1 
Hi, murphy

> -----Original Message-----
> From: Murphy Yang <murphyx.yang@intel.com>
> Sent: Wednesday, November 25, 2020 5:32 PM
> To: dev@dpdk.org
> Cc: Yang, Qiming <qiming.yang@intel.com>; Yang, SteveX
> <stevex.yang@intel.com>; Xing, Beilei <beilei.xing@intel.com>; Guo, Jia
> <jia.guo@intel.com>; Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang,
> MurphyX <murphyx.yang@intel.com>
> Subject: [PATCH 0/2] support GTP-U Tx offload on FVL and CVL

Where is the patch that enable the offload for CVL?

> 
> Support outer L3 and inner L3 + L4 Tx checksum offload for GTP-U packets
> that contain extension header on FVL.
> Support outer L3 + L4 and inner L3 + L4 Rx and Tx checksum offload for GTP-U
> packets that contain extension header on CVL.
> 
> Murphy Yang (2):
>   net/i40e: support GTP checksum offload
>   app/testpmd: support GTP-U extension packet checksum offload
> 
>  app/test-pmd/csumonly.c      | 26 +++++++++++++++++++++++---
>  drivers/net/i40e/i40e_rxtx.c |  1 +
>  2 files changed, 24 insertions(+), 3 deletions(-)
> 
> --
> 2.17.1