From patchwork Wed Sep 30 13:03:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 79337 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0B7E9A04B5; Wed, 30 Sep 2020 15:08:07 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 3645F1C231; Wed, 30 Sep 2020 15:08:06 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id D76CE1C210 for ; Wed, 30 Sep 2020 15:08:04 +0200 (CEST) IronPort-SDR: muRNjl2jwN4IibY4QKnH1vSil/0rAzwiHmUGQneUaaapvVOx+5n8xwNzez/GETkOmc1EFYD/aq KK9nYGeA5cfg== X-IronPort-AV: E=McAfee;i="6000,8403,9759"; a="150223428" X-IronPort-AV: E=Sophos;i="5.77,322,1596524400"; d="scan'208";a="150223428" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2020 06:08:02 -0700 IronPort-SDR: Yd3LM3EHH6rppoTB+Ui+BgDHUYkyTBzlnOisME0ikHIIUP5ro+83WdXNyGCsAezhAZiic5EbEk kpDriColC2yg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,322,1596524400"; d="scan'208";a="294603134" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga008.fm.intel.com with ESMTP; 30 Sep 2020 06:08:01 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power Date: Wed, 30 Sep 2020 14:03:56 +0100 Message-Id: <20200930130415.11211-1-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200807155859.63888-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v3 00/18] add max SIMD bitwidth to EAL X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" A number of components in DPDK have optional AVX-512 or other vector code paths which can be selected at runtime. Rather than having each component provide its own mechanism to select a code path, this patchset adds support for a single setting to control what code paths are used. This can be used to enable some non-default code paths e.g. ones using AVX-512, but also to limit the code paths to certain vector widths, or to scalar code only, which is useful for testing. The max SIMD bitwidth setting can be set by the app itself through use of the available API, or can be overriden by a commandline argument passed by the user. v3: - Added patch to add check for LPM lib - Modified default max bitwidth for Arm to disable max SIMD bitwidth, which will allow for SVE. - Added "0" as an acceptable value for command-line flag, which internally is used as UINT16_MAX to essentially disable max SIMD bitwidth limits. - Made suggested changes to net lib patch. - Rebased onto main. v2: - Added some documentation. - Modified default max bitwidth for Arm. - Moved mlx5 condition check into existing check vec support function. - Added max SIMD bitwidth checks to some libraries. Ciara Power (18): eal: add max SIMD bitwidth eal: add default SIMD bitwidth values doc: add detail on using max SIMD bitwidth net/i40e: add checks for max SIMD bitwidth net/axgbe: add checks for max SIMD bitwidth net/bnxt: add checks for max SIMD bitwidth net/enic: add checks for max SIMD bitwidth net/fm10k: add checks for max SIMD bitwidth net/iavf: add checks for max SIMD bitwidth net/ice: add checks for max SIMD bitwidth net/ixgbe: add checks for max SIMD bitwidth net/mlx5: add checks for max SIMD bitwidth net/virtio: add checks for max SIMD bitwidth distributor: add checks for max SIMD bitwidth member: add checks for max SIMD bitwidth efd: add checks for max SIMD bitwidth net: add checks for max SIMD bitwidth lpm: choose vector path at runtime doc/guides/howto/avx512.rst | 36 ++++++++++ doc/guides/howto/index.rst | 1 + doc/guides/linux_gsg/eal_args.include.rst | 16 +++++ .../prog_guide/env_abstraction_layer.rst | 32 +++++++++ drivers/net/axgbe/axgbe_rxtx.c | 3 +- drivers/net/bnxt/bnxt_ethdev.c | 6 +- drivers/net/enic/enic_rxtx_vec_avx2.c | 3 +- drivers/net/fm10k/fm10k_ethdev.c | 11 ++- drivers/net/i40e/i40e_rxtx.c | 19 ++++-- drivers/net/iavf/iavf_rxtx.c | 16 +++-- drivers/net/ice/ice_rxtx.c | 20 ++++-- drivers/net/ixgbe/ixgbe_rxtx.c | 7 +- drivers/net/mlx5/mlx5_rxtx_vec.c | 2 + drivers/net/virtio/virtio_ethdev.c | 9 ++- lib/librte_distributor/rte_distributor.c | 3 +- lib/librte_eal/arm/include/rte_vect.h | 2 + lib/librte_eal/common/eal_common_options.c | 67 +++++++++++++++++++ lib/librte_eal/common/eal_internal_cfg.h | 8 +++ lib/librte_eal/common/eal_options.h | 2 + lib/librte_eal/include/rte_eal.h | 33 +++++++++ lib/librte_eal/ppc/include/rte_vect.h | 2 + lib/librte_eal/rte_eal_version.map | 4 ++ lib/librte_eal/x86/include/rte_vect.h | 2 + lib/librte_efd/rte_efd.c | 7 +- lib/librte_lpm/rte_lpm.h | 57 +++++++++++++--- lib/librte_lpm/rte_lpm_altivec.h | 2 +- lib/librte_lpm/rte_lpm_neon.h | 2 +- lib/librte_lpm/rte_lpm_sse.h | 2 +- lib/librte_member/rte_member_ht.c | 3 +- lib/librte_net/rte_net_crc.c | 26 ++++--- lib/librte_net/rte_net_crc.h | 3 +- 31 files changed, 351 insertions(+), 55 deletions(-) create mode 100644 doc/guides/howto/avx512.rst