diff mbox series

[2/2] common/cnxk: update npc mcam range for 98xx

Message ID 20210730161009.14383-2-hkalra@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: Jerin Jacob
Headers
Series [1/2] common/cnxk: setup nix and lbk in loop mode in 98xx |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/github-robot success github build: passed
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-testing success Testing PASS
ci/iol-abi-testing success Testing PASS

Commit Message

Harman Kalra July 30, 2021, 4:10 p.m. UTC 
  NPC mcam entry distribution is based on maximum number of PFs and LFs
available. Fixing the max no of PFs and LFs available on 98xx to fix the
mcam alloc entry range.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
---
 drivers/common/cnxk/roc_npc.c      | 2 ++
 drivers/common/cnxk/roc_npc_priv.h | 6 ++++++
 2 files changed, 8 insertions(+)
diff mbox series

Patch

diff --git a/drivers/common/cnxk/roc_npc.c b/drivers/common/cnxk/roc_npc.c
index aff4eef554..27a7f20226 100644
--- a/drivers/common/cnxk/roc_npc.c
+++ b/drivers/common/cnxk/roc_npc.c
@@ -108,6 +108,8 @@  roc_npc_get_low_priority_mcam(struct roc_npc *roc_npc)
 
 	if (roc_model_is_cn10k())
 		return (npc->mcam_entries - NPC_MCAME_RESVD_10XX - 1);
+	else if (roc_model_is_cn98xx())
+		return (npc->mcam_entries - NPC_MCAME_RESVD_98XX - 1);
 	else
 		return (npc->mcam_entries - NPC_MCAME_RESVD_9XXX - 1);
 }
diff --git a/drivers/common/cnxk/roc_npc_priv.h b/drivers/common/cnxk/roc_npc_priv.h
index 5b884e3fd4..365701a545 100644
--- a/drivers/common/cnxk/roc_npc_priv.h
+++ b/drivers/common/cnxk/roc_npc_priv.h
@@ -46,10 +46,12 @@ 
 #define NPC_MCAM_KEY_X4_WORDS	  7 /* Number of 64-bit words */
 
 #define NPC_RVUPF_MAX_9XXX 0x10 /* HRM: RVU_PRIV_CONST */
+#define NPC_RVUPF_MAX_98XX 0x18 /* HRM: RVU_PRIV_CONST */
 #define NPC_RVUPF_MAX_10XX 0x20 /* HRM: RVU_PRIV_CONST */
 #define NPC_NIXLF_MAX	   0x80 /* HRM: NIX_AF_CONST2 */
 #define NPC_MCAME_PER_PF   3	/* DRV: RSVD_MCAM_ENTRIES_PER_PF */
 #define NPC_MCAME_PER_LF   1	/* DRV: RSVD_MCAM_ENTRIES_PER_NIXLF */
+#define NPC_NIXLF_MAX_98XX (2 * NPC_NIXLF_MAX) /*2 NIXLFs */
 #define NPC_MCAME_RESVD_9XXX                                                   \
 	(NPC_NIXLF_MAX * NPC_MCAME_PER_LF +                                    \
 	 (NPC_RVUPF_MAX_9XXX - 1) * NPC_MCAME_PER_PF)
@@ -58,6 +60,10 @@ 
 	(NPC_NIXLF_MAX * NPC_MCAME_PER_LF +                                    \
 	 (NPC_RVUPF_MAX_10XX - 1) * NPC_MCAME_PER_PF)
 
+#define NPC_MCAME_RESVD_98XX                                                   \
+	(NPC_NIXLF_MAX_98XX * NPC_MCAME_PER_LF +                               \
+	 (NPC_RVUPF_MAX_98XX - 1) * NPC_MCAME_PER_PF)
+
 enum npc_err_status {
 	NPC_ERR_PARAM = -1024,
 	NPC_ERR_NO_MEM,