diff mbox series

net/ice: fix max entry number for ACL normal priority

Message ID 20210728022429.237010-1-simei.su@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Qi Zhang
Headers
Series net/ice: fix max entry number for ACL normal priority |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/iol-intel-Functional success Functional Testing PASS
ci/github-robot success github build: passed
ci/Intel-compilation success Compilation OK
ci/iol-intel-Performance success Performance Testing PASS
ci/intel-Testing success Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-testing success Testing PASS

Commit Message

Simei Su July 28, 2021, 2:24 a.m. UTC 
  For ACL, there are three entry priorities: LOW, NORMAL, HIGH.
Low priority starts from the highest index, 25% of total entries;
Normal priority starts from the highest index, 50% of total entries;
High priority starts from the lowest index, 25% of total entries.

Each TCAM block has 512 entries of 40 bits. Currently, there is a
scenario in which multiple TCAM blocks are cascaded. It means the
total entries are 512. The default priority is NORMAL, so the max
entry is 256, not 512. This patch changes the max entry number for
NORMAL priority.

Fixes: 40d466fa9f76 ("net/ice: support ACL filter in DCF")

Signed-off-by: Simei Su <simei.su@intel.com>
---
 drivers/net/ice/ice_acl_filter.c | 4 ++--
 drivers/net/ice/ice_ethdev.h     | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

Comments

Qi Zhang Aug. 2, 2021, 2:01 a.m. UTC | #1 
> -----Original Message-----
> From: Su, Simei <simei.su@intel.com>
> Sent: Wednesday, July 28, 2021 10:24 AM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>
> Cc: dev@dpdk.org; Ding, Xuan <xuan.ding@intel.com>; Wu, Wenjun1
> <wenjun1.wu@intel.com>; Su, Simei <simei.su@intel.com>
> Subject: [PATCH] net/ice: fix max entry number for ACL normal priority
> 
> For ACL, there are three entry priorities: LOW, NORMAL, HIGH.
> Low priority starts from the highest index, 25% of total entries; Normal priority
> starts from the highest index, 50% of total entries; High priority starts from the
> lowest index, 25% of total entries.
> 
> Each TCAM block has 512 entries of 40 bits. Currently, there is a scenario in
> which multiple TCAM blocks are cascaded. It means the total entries are 512.
> The default priority is NORMAL, so the max entry is 256, not 512. This patch
> changes the max entry number for NORMAL priority.
> 
> Fixes: 40d466fa9f76 ("net/ice: support ACL filter in DCF")
> 
> Signed-off-by: Simei Su <simei.su@intel.com>

Acked-by: Qi Zhang <qi.z.zhang@intel.com>

Applied to dpdk-next-net-intel.

Thanks
Qi
diff mbox series

Patch

diff --git a/drivers/net/ice/ice_acl_filter.c b/drivers/net/ice/ice_acl_filter.c
index 3375609..0c15a70 100644
--- a/drivers/net/ice/ice_acl_filter.c
+++ b/drivers/net/ice/ice_acl_filter.c
@@ -430,7 +430,7 @@  ice_acl_hw_set_conf(struct ice_pf *pf, struct ice_fdir_fltr *input,
 	/* For IPV4_OTHER type, should add entry for all types.
 	 * For IPV4_UDP/TCP/SCTP type, only add entry for each.
 	 */
-	if (slot_id < MAX_ACL_ENTRIES) {
+	if (slot_id < MAX_ACL_NORMAL_ENTRIES) {
 		entry_id = ((uint64_t)flow_type << 32) | slot_id;
 		ret = ice_flow_add_entry(hw, blk, flow_type,
 					 entry_id, pf->main_vsi->idx,
@@ -444,7 +444,7 @@  ice_acl_hw_set_conf(struct ice_pf *pf, struct ice_fdir_fltr *input,
 		pf->acl.hw_entry_id[slot_id] = hw_entry;
 	} else {
 		PMD_DRV_LOG(ERR, "Exceed the maximum entry number(%d)"
-			    " HW supported!", MAX_ACL_ENTRIES);
+			    " HW supported!", MAX_ACL_NORMAL_ENTRIES);
 		return -1;
 	}
 
diff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h
index edafdf1..b4bf651 100644
--- a/drivers/net/ice/ice_ethdev.h
+++ b/drivers/net/ice/ice_ethdev.h
@@ -50,7 +50,7 @@ 
 #define ICE_PKG_FILE_SEARCH_PATH_UPDATES "/lib/firmware/updates/intel/ice/ddp/"
 #define ICE_MAX_PKG_FILENAME_SIZE   256
 
-#define MAX_ACL_ENTRIES    512
+#define MAX_ACL_NORMAL_ENTRIES    256
 
 /**
  * vlan_id is a 12 bit number.
@@ -408,7 +408,7 @@  struct ice_acl_conf {
 struct ice_acl_info {
 	struct ice_acl_conf conf;
 	struct rte_bitmap *slots;
-	uint64_t hw_entry_id[MAX_ACL_ENTRIES];
+	uint64_t hw_entry_id[MAX_ACL_NORMAL_ENTRIES];
 };
 
 struct ice_pf {