[2/2] net/cxgbe: avoid link FEC retraining during probe

Message ID 92d7ce2b978c6dd777d2c25e536530972789d10c.1610730372.git.rahul.lakkireddy@chelsio.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers
Series net/cxgbe: minor fixes for link related changes |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation fail Compilation issues

Commit Message

Rahul Lakkireddy Jan. 15, 2021, 5:19 p.m. UTC
  If link FEC has already been saved by firmware during link training
in probe, then use the saved FEC value, instead of retraining the
link. If link training is still not complete in probe, then firmware
will send the actual FEC later in link config change reply after
training is complete.

Also, there can only be 1 active FEC at any time. So, simplify the
FEC get ops. If FEC is supported and if none of the supported FEC
caps are set, then assume NOFEC by default, instead of AUTO.

Fixes: b99a547371e3 ("net/cxgbe: support configuring link FEC")

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
---
 drivers/net/cxgbe/base/t4_hw.c   | 11 ++++++++++-
 drivers/net/cxgbe/cxgbe_ethdev.c | 21 +++++----------------
 2 files changed, 15 insertions(+), 17 deletions(-)
  

Patch

diff --git a/drivers/net/cxgbe/base/t4_hw.c b/drivers/net/cxgbe/base/t4_hw.c
index 8587eec60..ef20dc667 100644
--- a/drivers/net/cxgbe/base/t4_hw.c
+++ b/drivers/net/cxgbe/base/t4_hw.c
@@ -4700,6 +4700,7 @@  void t4_reset_link_config(struct adapter *adap, int idx)
 void t4_init_link_config(struct port_info *pi, u32 pcaps, u32 acaps,
 			 u8 mdio_addr, u8 port_type, u8 mod_type)
 {
+	u8 fec_rs = 0, fec_baser = 0, fec_none = 0;
 	struct link_config *lc = &pi->link_cfg;
 
 	lc->pcaps = pcaps;
@@ -4722,8 +4723,16 @@  void t4_init_link_config(struct port_info *pi, u32 pcaps, u32 acaps,
 
 	/* Reset FEC caps to default values */
 	if (lc->pcaps & V_FW_PORT_CAP32_FEC(M_FW_PORT_CAP32_FEC)) {
+		if (lc->acaps & FW_PORT_CAP32_FEC_RS)
+			fec_rs = 1;
+		else if (lc->acaps & FW_PORT_CAP32_FEC_BASER_RS)
+			fec_baser = 1;
+		else
+			fec_none = 1;
+
 		lc->admin_caps &= ~V_FW_PORT_CAP32_FEC(M_FW_PORT_CAP32_FEC);
-		t4_set_link_fec(pi, 0, 0, 0, &lc->admin_caps);
+		t4_set_link_fec(pi, fec_rs, fec_baser, fec_none,
+				&lc->admin_caps);
 	}
 
 	if (lc->pcaps & FW_PORT_CAP32_FORCE_FEC)
diff --git a/drivers/net/cxgbe/cxgbe_ethdev.c b/drivers/net/cxgbe/cxgbe_ethdev.c
index 6f481551d..eb4258fe1 100644
--- a/drivers/net/cxgbe/cxgbe_ethdev.c
+++ b/drivers/net/cxgbe/cxgbe_ethdev.c
@@ -1256,24 +1256,13 @@  static int cxgbe_fec_get(struct rte_eth_dev *dev, uint32_t *fec_capa)
 	if (!(lc->pcaps & V_FW_PORT_CAP32_FEC(M_FW_PORT_CAP32_FEC)))
 		return -EOPNOTSUPP;
 
-	if (caps & FW_PORT_CAP32_FEC_NO_FEC) {
-		fec_caps = RTE_ETH_FEC_MODE_CAPA_MASK(NOFEC);
-		goto out;
-	}
-
-	if (caps & FW_PORT_CAP32_FEC_BASER_RS) {
-		fec_caps = RTE_ETH_FEC_MODE_CAPA_MASK(BASER);
-		goto out;
-	}
-
-	if (caps & FW_PORT_CAP32_FEC_RS) {
+	if (caps & FW_PORT_CAP32_FEC_RS)
 		fec_caps = RTE_ETH_FEC_MODE_CAPA_MASK(RS);
-		goto out;
-	}
-
-	fec_caps = RTE_ETH_FEC_MODE_CAPA_MASK(AUTO);
+	else if (caps & FW_PORT_CAP32_FEC_BASER_RS)
+		fec_caps = RTE_ETH_FEC_MODE_CAPA_MASK(BASER);
+	else
+		fec_caps = RTE_ETH_FEC_MODE_CAPA_MASK(NOFEC);
 
-out:
 	*fec_capa = fec_caps;
 	return 0;
 }