From patchwork Fri Nov 27 08:09:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ruifeng Wang X-Patchwork-Id: 84613 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 18C42A0524; Fri, 27 Nov 2020 09:09:51 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B6AF4C95A; Fri, 27 Nov 2020 09:09:42 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id 04484C928 for ; Fri, 27 Nov 2020 09:09:41 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 72EFD31B; Fri, 27 Nov 2020 00:09:39 -0800 (PST) Received: from net-arm-kp920-01.shanghai.arm.com (net-arm-kp920-01.shanghai.arm.com [10.169.210.104]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 3DA5C3F70D; Fri, 27 Nov 2020 00:09:36 -0800 (PST) From: Ruifeng Wang To: Jerin Jacob , Ruifeng Wang , Honnappa Nagarahalli Cc: dev@dpdk.org, nd@arm.com, Feifei Wang Date: Fri, 27 Nov 2020 16:09:02 +0800 Message-Id: <20201127080903.26817-2-ruifeng.wang@arm.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201127080903.26817-1-ruifeng.wang@arm.com> References: <20201127080903.26817-1-ruifeng.wang@arm.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH 1/2] eal/arm: fix gcc build for optimization level 0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Gcc build with '-O0' on platforms with RTE_ARM_FEATURE_ATOMICS set failed for: ../lib/librte_efd/rte_efd.c Assembler messages: 3866: Error: selected processor does not support `crc32cb w0,w0,w1' 3890: Error: selected processor does not support `crc32ch w0,w0,w1' 3914: Error: selected processor does not support `crc32cw w0,w0,w1' 3938: Error: selected processor does not support `crc32cx w0,w0,x1' This was caused by an architecture specifier added for Clang. Unlike Clang, Gcc considers each inline assembly block to be dependent and therefor, the architecture specifier impacts assemble of some blocks require certain extension support. Removed the architecture for Gcc to fix the issue. Fixes: 8fce34cd0a6a ("eal/arm: fix clang build of native target") Reported-by: Feifei Wang Signed-off-by: Ruifeng Wang Acked-by: Jerin Jacob --- lib/librte_eal/arm/include/rte_atomic_64.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/lib/librte_eal/arm/include/rte_atomic_64.h b/lib/librte_eal/arm/include/rte_atomic_64.h index 7fcd17466..467d32a45 100644 --- a/lib/librte_eal/arm/include/rte_atomic_64.h +++ b/lib/librte_eal/arm/include/rte_atomic_64.h @@ -46,7 +46,11 @@ rte_atomic_thread_fence(int memorder) /*------------------------ 128 bit atomic operations -------------------------*/ #if defined(__ARM_FEATURE_ATOMICS) || defined(RTE_ARM_FEATURE_ATOMICS) +#if defined(RTE_CC_CLANG) #define __LSE_PREAMBLE ".arch armv8-a+lse\n" +#else +#define __LSE_PREAMBLE "" +#endif #define __ATOMIC128_CAS_OP(cas_op_name, op_string) \ static __rte_noinline rte_int128_t \