diff mbox series

[v2,1/4] net/ixgbe: add new flag of stripped VLAN for NEON vector

Message ID 20201118104859.29047-2-feifei.wang2@arm.com (mailing list archive)
State Accepted, archived
Delegated to: Qi Zhang
Headers
Series Enable Checksum Offloading for NEON vector |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Feifei Wang Nov. 18, 2020, 10:48 a.m. UTC 
  For NEON vector of IXGBE PMD, introduce new flag PKT_RX_VLAN_STRIPPED to
show the case that the VLAN is stripped from the VLAN tagged packet.

This is because that the old flag PKT_RX_VLAN_PKT only indicates that the
packet is VLAN tagged, but cannot show whether VLAN is in m->vlan_tci or
in the packet at present. So add new flag to show the vlan has been
stripped by the hardware and its tci is saved in m->vlan_tci when vlan
stripping is enabled in the RX configuration of the IXGBE PMD.

Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
---
 drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c | 36 ++++++++++++++++---------
 1 file changed, 23 insertions(+), 13 deletions(-)

Comments

Wang, Haiyue Nov. 18, 2020, 11:51 a.m. UTC | #1 
> -----Original Message-----
> From: Feifei Wang <feifei.wang2@arm.com>
> Sent: Wednesday, November 18, 2020 18:49
> To: Jerin Jacob <jerinj@marvell.com>; Ruifeng Wang <ruifeng.wang@arm.com>; Guo, Jia
> <jia.guo@intel.com>; Wang, Haiyue <haiyue.wang@intel.com>
> Cc: dev@dpdk.org; nd@arm.com; Feifei Wang <feifei.wang2@arm.com>
> Subject: [PATCH v2 1/4] net/ixgbe: add new flag of stripped VLAN for NEON vector
> 
> For NEON vector of IXGBE PMD, introduce new flag PKT_RX_VLAN_STRIPPED to
> show the case that the VLAN is stripped from the VLAN tagged packet.
> 
> This is because that the old flag PKT_RX_VLAN_PKT only indicates that the
> packet is VLAN tagged, but cannot show whether VLAN is in m->vlan_tci or
> in the packet at present. So add new flag to show the vlan has been
> stripped by the hardware and its tci is saved in m->vlan_tci when vlan
> stripping is enabled in the RX configuration of the IXGBE PMD.
> 
> Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
> ---
>  drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c | 36 ++++++++++++++++---------
>  1 file changed, 23 insertions(+), 13 deletions(-)
> 


Acked-by: Haiyue Wang <haiyue.wang@intel.com>


> --
> 2.17.1
diff mbox series

Patch

diff --git a/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c b/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c
index 4c81ae9dc..e6d877af9 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c
@@ -81,11 +81,9 @@  ixgbe_rxq_rearm(struct ixgbe_rx_queue *rxq)
 	IXGBE_PCI_REG_WRITE(rxq->rdt_reg_addr, rx_id);
 }
 
-#define VTAG_SHIFT     (3)
-
 static inline void
 desc_to_olflags_v(uint8x16x2_t sterr_tmp1, uint8x16x2_t sterr_tmp2,
-		  uint8x16_t staterr, struct rte_mbuf **rx_pkts)
+		  uint8x16_t staterr, uint8_t vlan_flags, struct rte_mbuf **rx_pkts)
 {
 	uint8x16_t ptype;
 	uint8x16_t vtag;
@@ -95,13 +93,6 @@  desc_to_olflags_v(uint8x16x2_t sterr_tmp1, uint8x16x2_t sterr_tmp2,
 		uint32_t word;
 	} vol;
 
-	const uint8x16_t pkttype_msk = {
-			PKT_RX_VLAN, PKT_RX_VLAN,
-			PKT_RX_VLAN, PKT_RX_VLAN,
-			0x00, 0x00, 0x00, 0x00,
-			0x00, 0x00, 0x00, 0x00,
-			0x00, 0x00, 0x00, 0x00};
-
 	const uint8x16_t rsstype_msk = {
 			0x0F, 0x0F, 0x0F, 0x0F,
 			0x00, 0x00, 0x00, 0x00,
@@ -114,12 +105,26 @@  desc_to_olflags_v(uint8x16x2_t sterr_tmp1, uint8x16x2_t sterr_tmp2,
 			PKT_RX_RSS_HASH, 0, 0, 0,
 			0, 0, 0, PKT_RX_FDIR};
 
+	const uint8x16_t vlan_msk = {
+			IXGBE_RXD_STAT_VP, IXGBE_RXD_STAT_VP,
+			IXGBE_RXD_STAT_VP, IXGBE_RXD_STAT_VP,
+			0, 0, 0, 0,
+			0, 0, 0, 0,
+			0, 0, 0, 0};
+
+	const uint8x16_t vlan_map = {
+			0, 0, 0, 0,
+			0, 0, 0, 0,
+			vlan_flags, 0, 0, 0,
+			0, 0, 0, 0};
+
 	ptype = vzipq_u8(sterr_tmp1.val[0], sterr_tmp2.val[0]).val[0];
 	ptype = vandq_u8(ptype, rsstype_msk);
 	ptype = vqtbl1q_u8(rss_flags, ptype);
 
-	vtag = vshrq_n_u8(staterr, VTAG_SHIFT);
-	vtag = vandq_u8(vtag, pkttype_msk);
+	/* extract vlan_flags from IXGBE_RXD_STAT_VP bits of staterr */
+	vtag = vandq_u8(staterr, vlan_msk);
+	vtag = vqtbl1q_u8(vlan_map, vtag);
 	vtag = vorrq_u8(ptype, vtag);
 
 	vol.word = vgetq_lane_u32(vreinterpretq_u32_u8(vtag), 0);
@@ -221,6 +226,7 @@  _recv_raw_pkts_vec(struct ixgbe_rx_queue *rxq, struct rte_mbuf **rx_pkts,
 		};
 	uint16x8_t crc_adjust = {0, 0, rxq->crc_len, 0,
 				 rxq->crc_len, 0, 0, 0};
+	uint8_t vlan_flags;
 
 	/* nb_pkts has to be floor-aligned to RTE_IXGBE_DESCS_PER_LOOP */
 	nb_pkts = RTE_ALIGN_FLOOR(nb_pkts, RTE_IXGBE_DESCS_PER_LOOP);
@@ -250,6 +256,10 @@  _recv_raw_pkts_vec(struct ixgbe_rx_queue *rxq, struct rte_mbuf **rx_pkts,
 	 */
 	sw_ring = &rxq->sw_ring[rxq->rx_tail];
 
+	/* ensure these 2 flags are in the lower 8 bits */
+	RTE_BUILD_BUG_ON((PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED) > UINT8_MAX);
+	vlan_flags = rxq->vlan_flags & UINT8_MAX;
+
 	/* A. load 4 packet in one loop
 	 * B. copy 4 mbuf point from swring to rx_pkts
 	 * C. calc the number of DD bits among the 4 packets
@@ -311,7 +321,7 @@  _recv_raw_pkts_vec(struct ixgbe_rx_queue *rxq, struct rte_mbuf **rx_pkts,
 		staterr = vzipq_u8(sterr_tmp1.val[1], sterr_tmp2.val[1]).val[0];
 
 		/* set ol_flags with vlan packet type */
-		desc_to_olflags_v(sterr_tmp1, sterr_tmp2, staterr,
+		desc_to_olflags_v(sterr_tmp1, sterr_tmp2, staterr, vlan_flags,
 				  &rx_pkts[pos]);
 
 		/* D.2 pkt 3,4 set in_port/nb_seg and remove crc */