From patchwork Thu Nov 5 21:17:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Natanael Copa X-Patchwork-Id: 83760 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9E6A8A0521; Thu, 5 Nov 2020 22:18:39 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6CB6C2C16; Thu, 5 Nov 2020 22:17:41 +0100 (CET) Received: from mx1.tetrasec.net (mx1.tetrasec.net [66.245.176.36]) by dpdk.org (Postfix) with ESMTP id AB0E51515; Thu, 5 Nov 2020 22:17:37 +0100 (CET) Received: from mx1.tetrasec.net (mail.local [127.0.0.1]) by mx1.tetrasec.net (Postfix) with ESMTP id 4336F13C5F1; Thu, 5 Nov 2020 21:17:36 +0000 (UTC) Received: from ncopa-desktop.lan (67.63.200.37.customer.cdi.no [37.200.63.67]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: n@tanael.org) by mx1.tetrasec.net (Postfix) with ESMTPSA id 6DD9213C5EF; Thu, 5 Nov 2020 21:17:35 +0000 (UTC) From: Natanael Copa To: dev@dpdk.org, Ferruh Yigit Cc: Natanael Copa , stable@dpdk.org Date: Thu, 5 Nov 2020 22:17:11 +0100 Message-Id: <20201105211716.25181-4-ncopa@alpinelinux.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201105211716.25181-1-ncopa@alpinelinux.org> References: <18966392.1bK43UoomU@xps> <20201105211716.25181-1-ncopa@alpinelinux.org> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v4 3/8] bus/pci: add fallback for out* for non GNU libc X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add a fallback for non-GNU libc systems like musl libc for the non-standard functions outl_p, outw_p and outb_p. This solves the following buildtime errors when building with musl libc: pci_uio.c:(.text+0xaa1): undefined reference to `outw_p' pci_uio.c:(.text+0xac5): undefined reference to `outl_p' pci_uio.c:(.text+0xadf): undefined reference to `outb_p' We also handle the non-x86 with macros to factor out various ifdefs in the code. Bugzilla ID: 35 Fixes: c752998b5e2e ("pci: introduce library and driver") Cc: stable@dpdk.org Signed-off-by: Natanael Copa --- drivers/bus/pci/linux/pci_uio.c | 95 ++++++++++++++++++++++----------- 1 file changed, 64 insertions(+), 31 deletions(-) diff --git a/drivers/bus/pci/linux/pci_uio.c b/drivers/bus/pci/linux/pci_uio.c index f3305a2f2..626c8a2cc 100644 --- a/drivers/bus/pci/linux/pci_uio.c +++ b/drivers/bus/pci/linux/pci_uio.c @@ -14,7 +14,64 @@ #if defined(RTE_ARCH_X86) #include -#endif + +#define pci_uio_inl(reg) inl(reg) +#define pci_uio_inw(reg) inw(reg) +#define pci_uio_inb(reg) inb(reg) + +#else /* RTE_ARCH_X86 */ + +#define pci_uio_inl(reg) (*(volatile uint32_t *)(reg)) +#define pci_uio_inw(reg) (*(volatile uint16_t *)(reg)) +#define pci_uio_inb(reg) (*(volatile uint8_t *)(reg)) + +#endif /* RTE_ARCH_X86 */ + + +#if defined(RTE_ARCH_X86) +static inline void +pci_uio_outl_p(unsigned int value, unsigned short int port) +{ +#if defined(__GLIBC__) + outl_p(value, port); +#else /* __GLIBC__ */ + __asm__ __volatile__ ("outl %0,%w1\noutb %%al,$0x80" : : "a" (value), + "Nd" (port)); +#endif /* __GLIBC__ */ +} +#else /* RTE_ARCH_X86 */ +#define pci_uio_outl_p(value, reg) (*(volatile uint32_t *)(reg) = (value)) +#endif /* RTE_ARCH_X86 */ + +#if defined(RTE_ARCH_X86) +static inline void +pci_uio_outw_p(unsigned short int value, unsigned short int port) +{ +#if defined(__GLIBC__) + outw_p(value, port); +#else /* __GLIBC__ */ + __asm__ __volatile__ ("outw %w0,%w1\noutb %%al,$0x80" : : "a" (value), + "Nd" (port)); +#endif /* __GLIBC__ */ +} +#else /* RTE_ARCH_X86 */ +#define pci_uio_outw_p(value, reg) (*(volatile uint16_t *)(reg) = (value)) +#endif /* RTE_ARCH_X86 */ + +#if defined(RTE_ARCH_X86) +static inline void +pci_uio_outb_p(unsigned char value, unsigned short int port) +{ +#if defined(__GLIBC__) + outb_p(value, port); +#else /* __GLIBC__ */ + __asm__ __volatile__ ("outb %b0,%w1\noutb %%al,$0x80" : : "a" (value), + "Nd" (port)); +#endif /* __GLIBC__ */ +} +#else /* RTE_ARCH_X86 */ +#define pci_uio_outb_p(value, reg) (*(volatile uint8_t *)(reg) = (value)) +#endif /* RTE_ARCH_X86 */ #include #include @@ -500,25 +557,13 @@ pci_uio_ioport_read(struct rte_pci_ioport *p, for (d = data; len > 0; d += size, reg += size, len -= size) { if (len >= 4) { size = 4; -#if defined(RTE_ARCH_X86) - *(uint32_t *)d = inl(reg); -#else - *(uint32_t *)d = *(volatile uint32_t *)reg; -#endif + *(uint32_t *)d = pci_uio_inl(reg); } else if (len >= 2) { size = 2; -#if defined(RTE_ARCH_X86) - *(uint16_t *)d = inw(reg); -#else - *(uint16_t *)d = *(volatile uint16_t *)reg; -#endif + *(uint16_t *)d = pci_uio_inw(reg); } else { size = 1; -#if defined(RTE_ARCH_X86) - *d = inb(reg); -#else - *d = *(volatile uint8_t *)reg; -#endif + *d = pci_uio_inb(reg); } } } @@ -534,25 +579,13 @@ pci_uio_ioport_write(struct rte_pci_ioport *p, for (s = data; len > 0; s += size, reg += size, len -= size) { if (len >= 4) { size = 4; -#if defined(RTE_ARCH_X86) - outl_p(*(const uint32_t *)s, reg); -#else - *(volatile uint32_t *)reg = *(const uint32_t *)s; -#endif + pci_uio_outl_p(*(const uint32_t *)s, reg); } else if (len >= 2) { size = 2; -#if defined(RTE_ARCH_X86) - outw_p(*(const uint16_t *)s, reg); -#else - *(volatile uint16_t *)reg = *(const uint16_t *)s; -#endif + pci_uio_outw_p(*(const uint16_t *)s, reg); } else { size = 1; -#if defined(RTE_ARCH_X86) - outb_p(*s, reg); -#else - *(volatile uint8_t *)reg = *s; -#endif + pci_uio_outb_p(*s, reg); } } }