From patchwork Tue Oct 27 20:17:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vimal Chungath X-Patchwork-Id: 82363 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8F327A04B5; Tue, 27 Oct 2020 21:23:13 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 309D32BDB; Tue, 27 Oct 2020 21:23:11 +0100 (CET) Received: from smtp-fw-9102.amazon.com (smtp-fw-9102.amazon.com [207.171.184.29]) by dpdk.org (Postfix) with ESMTP id C92C72BD5 for ; Tue, 27 Oct 2020 21:23:09 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1603830190; x=1635366190; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=NkAxZdpHe0sXVA/bHBPL3aKY5OhVg+dMcxXlNBVhZGk=; b=Hd7FZrBbKbPdiHNNZMhG6Re50sf0k8NU72zVx2ljNPjdedA9t6/t6xMM QTFPZCkmQIAhZ/MG/F8z2F+isuQz2sYDILXu6okr8T7YmLmClYvknJcGJ tJrsgJWz/0htJ9n+s+umH5x5Ks/awehcHeRy7tbasDIlztaqUHSvda+7w 0=; X-IronPort-AV: E=Sophos;i="5.77,424,1596499200"; d="scan'208";a="89114969" Received: from sea32-co-svc-lb4-vlan3.sea.corp.amazon.com (HELO email-inbound-relay-2a-e7be2041.us-west-2.amazon.com) ([10.47.23.38]) by smtp-border-fw-out-9102.sea19.amazon.com with ESMTP; 27 Oct 2020 20:17:55 +0000 Received: from EX13MTAUWB001.ant.amazon.com (pdx4-ws-svc-p6-lb7-vlan2.pdx.amazon.com [10.170.41.162]) by email-inbound-relay-2a-e7be2041.us-west-2.amazon.com (Postfix) with ESMTPS id D4A97A1999; Tue, 27 Oct 2020 20:17:54 +0000 (UTC) Received: from EX13D02UWB001.ant.amazon.com (10.43.161.240) by EX13MTAUWB001.ant.amazon.com (10.43.161.207) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 27 Oct 2020 20:17:54 +0000 Received: from EX13MTAUEA002.ant.amazon.com (10.43.61.77) by EX13D02UWB001.ant.amazon.com (10.43.161.240) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 27 Oct 2020 20:17:53 +0000 Received: from dev-dsk-vcchunga-2a-c5-3b7a0bed.us-west-2.amazon.com (172.19.55.163) by mail-relay.amazon.com (10.43.61.169) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 27 Oct 2020 20:17:51 +0000 Received: by dev-dsk-vcchunga-2a-c5-3b7a0bed.us-west-2.amazon.com (Postfix, from userid 6361087) id E21A6B60C6; Tue, 27 Oct 2020 13:17:50 -0700 (PDT) From: Vimal Chungath To: CC: , , , , , , , , , Date: Tue, 27 Oct 2020 13:17:33 -0700 Message-ID: <20201027201733.14206-2-vcchunga@amazon.com> X-Mailer: git-send-email 2.16.6 In-Reply-To: <20201027201733.14206-1-vcchunga@amazon.com> References: <20200909011109.2048-1-vcchunga@amazon.com> <20201027201733.14206-1-vcchunga@amazon.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2 1/1] build: add Graviton2(arm64) meson configuration X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add meson build configuration for Graviton2 platform with 64-bit Arm Neoverse N1 cores. This patch makes the following changes to generic Neoverse N1 config: 1. increase lcore limit to 64 2. increase memory support to 1TB 3. remove +crc from -march as that is default when setting armv8.2 For more information about Graviton2 platform, refer to: https://aws.amazon.com/ec2/graviton/ Signed-off-by: Vimal Chungath Reviewed-by: Honnappa Nagarahalli --- config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++ config/arm/meson.build | 12 +++++++++++- 2 files changed, 28 insertions(+), 1 deletion(-) create mode 100644 config/arm/arm64_graviton2_linux_gcc diff --git a/config/arm/arm64_graviton2_linux_gcc b/config/arm/arm64_graviton2_linux_gcc new file mode 100644 index 000000000..022e06303 --- /dev/null +++ b/config/arm/arm64_graviton2_linux_gcc @@ -0,0 +1,17 @@ +[binaries] +c = 'aarch64-linux-gnu-gcc' +cpp = 'aarch64-linux-gnu-cpp' +ar = 'aarch64-linux-gnu-gcc-ar' +strip = 'aarch64-linux-gnu-strip' +pkgconfig = 'aarch64-linux-gnu-pkg-config' +pcap-config = '' + +[host_machine] +system = 'linux' +cpu_family = 'aarch64' +cpu = 'armv8-a' +endian = 'little' + +[properties] +implementor_id = '0x41' +implementor_pn = '0xd0c' diff --git a/config/arm/meson.build b/config/arm/meson.build index b49203fa8..0e7124843 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -86,6 +86,16 @@ flags_octeontx2_extra = [ ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_EAL_IGB_UIO', false], ['RTE_USE_C11_MEM_MODEL', true]] +flags_n1generic_extra = [ + ['RTE_MACHINE', '"neoverse-n1"'], + ['RTE_MAX_LCORE', 64], + ['RTE_CACHE_LINE_SIZE', 64], + ['RTE_ARM_FEATURE_ATOMICS', true], + ['RTE_USE_C11_MEM_MODEL', true], + ['RTE_MAX_MEM_MB', 1048576], + ['RTE_MAX_NUMA_NODES', 1], + ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false], + ['RTE_LIBRTE_VHOST_NUMA', false]] machine_args_generic = [ ['default', ['-march=armv8-a+crc', '-moutline-atomics']], @@ -97,7 +107,7 @@ machine_args_generic = [ ['0xd09', ['-mcpu=cortex-a73']], ['0xd0a', ['-mcpu=cortex-a75']], ['0xd0b', ['-mcpu=cortex-a76']], - ['0xd0c', ['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'], flags_n1sdp_extra]] + ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'], flags_n1generic_extra]] machine_args_cavium = [ ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],