@@ -15,3 +15,5 @@ endian = 'little'
[properties]
implementer_id = '0x56'
+max_numa_nodes = 1
+max_lcores = 16
@@ -26,3 +26,9 @@ implementer_id = 'generic'
# '0xd0a': cortex-a75
# '0xd0b': cortex-a76
part_number = 'generic'
+
+# Supported extra configuration
+# max_numa_nodes = n # will set RTE_MAX_NUMA_NODES
+# max_lcores = n # will set RTE_MAX_LCORE
+max_lcores = 256
+max_numa_nodes = 4
@@ -15,3 +15,5 @@ endian = 'little'
[properties]
implementer_id = '0x41'
part_number = '0xd08'
+max_numa_nodes = 1
+max_lcores = 16
@@ -15,3 +15,5 @@ endian = 'little'
[properties]
implementer_id = 'dpaa'
+max_numa_nodes = 1
+max_lcores = 16
@@ -14,3 +14,5 @@ endian = 'little'
[properties]
implementer_id = '0x50'
+max_numa_nodes = 1
+max_lcores = 32
@@ -15,3 +15,5 @@ endian = 'little'
[properties]
implementer_id = '0x41'
part_number = '0xd0c'
+max_numa_nodes = 1
+max_lcores = 4
@@ -15,3 +15,5 @@ endian = 'little'
[properties]
implementer_id = '0x43'
part_number = '0xb2'
+max_numa_nodes = 1
+max_lcores = 36
@@ -15,3 +15,5 @@ endian = 'little'
[properties]
implementer_id = '0x41'
part_number = '0xd08'
+max_numa_nodes = 1
+max_lcores = 16
@@ -15,3 +15,5 @@ endian = 'little'
[properties]
implementer_id = '0x43'
part_number = '0xaf'
+max_numa_nodes = 2
+max_lcores = 256
@@ -14,3 +14,5 @@ endian = 'little'
[properties]
implementer_id = '0x43'
+max_numa_nodes = 1
+max_lcores = 96
@@ -33,44 +33,40 @@ flags_common_default = [
['RTE_ARCH_ARM64', true]
]
+# add these to defaults when machine='generic-armv8'
+flags_force_generic = [
+ ['RTE_MAX_NUMA_NODES', 4],
+ ['RTE_MAX_LCORE', 256]
+]
+
# implementer specific aarch64 flags, with middle priority
# (will overwrite common flags)
flags_generic = [
['RTE_MACHINE', '"armv8a"'],
- ['RTE_MAX_LCORE', 256],
['RTE_USE_C11_MEM_MODEL', true],
['RTE_CACHE_LINE_SIZE', 128]
]
flags_arm = [
['RTE_MACHINE', '"armv8a"'],
- ['RTE_MAX_LCORE', 16],
['RTE_USE_C11_MEM_MODEL', true],
['RTE_CACHE_LINE_SIZE', 64]
]
flags_cavium = [
['RTE_CACHE_LINE_SIZE', 128],
- ['RTE_MAX_NUMA_NODES', 2],
- ['RTE_MAX_LCORE', 96],
['RTE_MAX_VFIO_GROUPS', 128]
]
flags_dpaa = [
['RTE_MACHINE', '"dpaa"'],
['RTE_USE_C11_MEM_MODEL', true],
['RTE_CACHE_LINE_SIZE', 64],
- ['RTE_MAX_NUMA_NODES', 1],
- ['RTE_MAX_LCORE', 16],
['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false]
]
flags_emag = [
['RTE_MACHINE', '"emag"'],
- ['RTE_MAX_NUMA_NODES', 1],
- ['RTE_MAX_LCORE', 32],
['RTE_CACHE_LINE_SIZE', 64]
]
flags_armada = [
['RTE_MACHINE', '"armv8a"'],
- ['RTE_MAX_NUMA_NODES', 1],
- ['RTE_MAX_LCORE', 16],
['RTE_CACHE_LINE_SIZE', 64]
]
@@ -78,8 +74,6 @@ flags_armada = [
# (will overwrite both common and implementer specific flags)
flags_n1sdp_extra = [
['RTE_MACHINE', '"n1sdp"'],
- ['RTE_MAX_NUMA_NODES', 1],
- ['RTE_MAX_LCORE', 4],
['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
['RTE_LIBRTE_VHOST_NUMA', false]
]
@@ -90,15 +84,11 @@ flags_thunderx_extra = [
flags_thunderx2_extra = [
['RTE_MACHINE', '"thunderx2"'],
['RTE_CACHE_LINE_SIZE', 64],
- ['RTE_MAX_NUMA_NODES', 2],
- ['RTE_MAX_LCORE', 256],
['RTE_ARM_FEATURE_ATOMICS', true],
['RTE_USE_C11_MEM_MODEL', true]
]
flags_octeontx2_extra = [
['RTE_MACHINE', '"octeontx2"'],
- ['RTE_MAX_NUMA_NODES', 1],
- ['RTE_MAX_LCORE', 36],
['RTE_ARM_FEATURE_ATOMICS', true],
['RTE_EAL_IGB_UIO', false],
['RTE_USE_C11_MEM_MODEL', true]
@@ -160,6 +150,7 @@ else
# default build
impl_config = impl_generic
part_number = 'generic'
+ flags_common_default += flags_force_generic
else
# native build
# The script returns ['Implementer', 'Variant', 'Architecture',
@@ -214,6 +205,26 @@ else
dpdk_flags += part_number_config[1]
endif
+ # apply cross-specific options
+ if meson.is_cross_build()
+ # configure RTE_MAX_NUMA_NODES and RTE_MAX_LCORE from cross file
+ # RFC: do we want defaults for these two? or should we require
+ # that all cross file define them?
+ cross_max_numa_nodes = meson.get_cross_property('max_numa_nodes', 0)
+ if cross_max_numa_nodes != 0
+ dpdk_flags += [
+ ['RTE_MAX_NUMA_NODES', cross_max_numa_nodes]
+ ]
+ endif
+ cross_max_lcores = meson.get_cross_property('max_lcores', 0)
+ if cross_max_lcores != 0
+ message('Setting RTE_MAX_LCORE from cross file')
+ dpdk_flags += [
+ ['RTE_MAX_LCORE', cross_max_lcores]
+ ]
+ endif
+ endif
+
machine_args = [] # Clear previous machine args
foreach flag: part_number_config[0]
if cc.has_argument(flag)