[v6,11/18] net/mlx5: add checks for max SIMD bitwidth
Checks
Commit Message
When choosing a vector path to take, an extra condition must be
satisfied to ensure the max SIMD bitwidth allows for the CPU enabled
path.
Cc: Matan Azrad <matan@mellanox.com>
Cc: Shahaf Shuler <shahafs@mellanox.com>
Cc: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
v4: Updated enum name.
v2: Moved check for max bitwidth into existing check vec
support function.
---
drivers/net/mlx5/mlx5_rxtx_vec.c | 2 ++
1 file changed, 2 insertions(+)
@@ -148,6 +148,8 @@ mlx5_check_vec_rx_support(struct rte_eth_dev *dev)
struct mlx5_priv *priv = dev->data->dev_private;
uint32_t i;
+ if (rte_get_max_simd_bitwidth() < RTE_SIMD_128)
+ return -ENOTSUP;
if (!priv->config.rx_vec_en)
return -ENOTSUP;
if (mlx5_mprq_enabled(dev))