[25/36] net/sfc: support Tx VLAN insertion offload for EF100
diff mbox series

Message ID 1602596753-32282-26-git-send-email-arybchenko@solarflare.com
State Accepted, archived
Delegated to: Ferruh Yigit
Headers show
Series
  • net/sfc: add EF100 support
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Context Check Description
ci/checkpatch warning coding style issues

Commit Message

Andrew Rybchenko Oct. 13, 2020, 1:45 p.m. UTC
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 doc/guides/nics/sfc_efx.rst    |  4 ++--
 drivers/net/sfc/sfc_ef100_tx.c | 21 ++++++++++++++++++++-
 2 files changed, 22 insertions(+), 3 deletions(-)

Patch
diff mbox series

diff --git a/doc/guides/nics/sfc_efx.rst b/doc/guides/nics/sfc_efx.rst
index e108043f38..c89484d473 100644
--- a/doc/guides/nics/sfc_efx.rst
+++ b/doc/guides/nics/sfc_efx.rst
@@ -329,8 +329,8 @@  boolean parameters value.
   is even more faster then **ef10** but does not support multi-segment
   mbufs, disallows multiple mempools and neglects mbuf reference counters.
   **ef100** chooses EF100 native datapath which supports multi-segment
-  mbufs, inner/outer IPv4 and TCP/UDP checksum and TCP segmentation offloads
-  including VXLAN and GENEVE IPv4/IPv6 tunnels.
+  mbufs, VLAN insertion, inner/outer IPv4 and TCP/UDP checksum and TCP
+  segmentation offloads including VXLAN and GENEVE IPv4/IPv6 tunnels.
 
 - ``perf_profile`` [auto|throughput|low-latency] (default **throughput**)
 
diff --git a/drivers/net/sfc/sfc_ef100_tx.c b/drivers/net/sfc/sfc_ef100_tx.c
index a740bc9d55..fcf61d987c 100644
--- a/drivers/net/sfc/sfc_ef100_tx.c
+++ b/drivers/net/sfc/sfc_ef100_tx.c
@@ -381,6 +381,16 @@  sfc_ef100_tx_qdesc_send_create(const struct rte_mbuf *m, efx_oword_t *tx_desc)
 			ESF_GZ_TX_SEND_CSO_OUTER_L3, outer_l3,
 			ESF_GZ_TX_SEND_CSO_OUTER_L4, outer_l4,
 			ESF_GZ_TX_DESC_TYPE, ESE_GZ_TX_DESC_TYPE_SEND);
+
+	if (m->ol_flags & PKT_TX_VLAN_PKT) {
+		efx_oword_t tx_desc_extra_fields;
+
+		EFX_POPULATE_OWORD_2(tx_desc_extra_fields,
+				ESF_GZ_TX_SEND_VLAN_INSERT_EN, 1,
+				ESF_GZ_TX_SEND_VLAN_INSERT_TCI, m->vlan_tci);
+
+		EFX_OR_OWORD(*tx_desc, tx_desc_extra_fields);
+	}
 }
 
 static void
@@ -453,6 +463,14 @@  sfc_ef100_tx_qdesc_tso_create(const struct rte_mbuf *m,
 			ESF_GZ_TX_DESC_TYPE, ESE_GZ_TX_DESC_TYPE_TSO);
 
 	EFX_OR_OWORD(*tx_desc, tx_desc_extra_fields);
+
+	if (m->ol_flags & PKT_TX_VLAN_PKT) {
+		EFX_POPULATE_OWORD_2(tx_desc_extra_fields,
+				ESF_GZ_TX_TSO_VLAN_INSERT_EN, 1,
+				ESF_GZ_TX_TSO_VLAN_INSERT_TCI, m->vlan_tci);
+
+		EFX_OR_OWORD(*tx_desc, tx_desc_extra_fields);
+	}
 }
 
 static inline void
@@ -923,7 +941,8 @@  struct sfc_dp_tx sfc_ef100_tx = {
 	},
 	.features		= SFC_DP_TX_FEAT_MULTI_PROCESS,
 	.dev_offload_capa	= 0,
-	.queue_offload_capa	= DEV_TX_OFFLOAD_IPV4_CKSUM |
+	.queue_offload_capa	= DEV_TX_OFFLOAD_VLAN_INSERT |
+				  DEV_TX_OFFLOAD_IPV4_CKSUM |
 				  DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 				  DEV_TX_OFFLOAD_OUTER_UDP_CKSUM |
 				  DEV_TX_OFFLOAD_UDP_CKSUM |