From patchwork Mon Sep 28 19:03:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Honnappa Nagarahalli X-Patchwork-Id: 79051 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id EB584A04DB; Mon, 28 Sep 2020 21:04:32 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 80FFD1D69D; Mon, 28 Sep 2020 21:04:10 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id EBA1A1D66B; Mon, 28 Sep 2020 21:04:06 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 45D51113E; Mon, 28 Sep 2020 12:04:05 -0700 (PDT) Received: from qc2400f-1.austin.arm.com (qc2400f-1.austin.arm.com [10.118.12.27]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 355963F70D; Mon, 28 Sep 2020 12:04:05 -0700 (PDT) From: Honnappa Nagarahalli To: dev@dpdk.org, honnappa.nagarahalli@arm.com, phil.yang@arm.com, jgrajcia@cisco.com, ferruh.yigit@intel.com Cc: nd@arm.com, stable@dpdk.org Date: Mon, 28 Sep 2020 14:03:28 -0500 Message-Id: <20200928190334.40624-2-honnappa.nagarahalli@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200928190334.40624-1-honnappa.nagarahalli@arm.com> References: <20200921192254.20560-1-honnappa.nagarahalli@arm.com> <20200928190334.40624-1-honnappa.nagarahalli@arm.com> Subject: [dpdk-dev] [PATCH v2 2/8] net/memif: relax the load of ring tail pointer for M2S ring X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" For M2S rings, ring->tail is updated by the sender and eth_memif_tx function is called in the context of sending thread. The loads in the sender do not need to synchronize with its own stores. Fixes: a2aafb9aa651 ("net/memif: optimize with one-way barrier") Cc: phil.yang@arm.com Cc: stable@dpdk.org Signed-off-by: Honnappa Nagarahalli Reviewed-by: Phil Yang Reviewed-by: Ruifeng Wang --- drivers/net/memif/rte_eth_memif.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/net/memif/rte_eth_memif.c b/drivers/net/memif/rte_eth_memif.c index 130099f2e..8bacacaa8 100644 --- a/drivers/net/memif/rte_eth_memif.c +++ b/drivers/net/memif/rte_eth_memif.c @@ -585,7 +585,13 @@ eth_memif_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts) n_free = ring_size - slot + __atomic_load_n(&ring->tail, __ATOMIC_ACQUIRE); } else { - slot = __atomic_load_n(&ring->tail, __ATOMIC_ACQUIRE); + /* For M2S queues ring->tail is updated by the sender and + * this function is called in the context of sending thread. + * The loads in the sender do not need to synchronize with + * its own stores. Hence, the following load can be a + * relaxed load. + */ + slot = __atomic_load_n(&ring->tail, __ATOMIC_RELAXED); n_free = __atomic_load_n(&ring->head, __ATOMIC_ACQUIRE) - slot; }