From patchwork Mon Sep 28 16:42:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 79032 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id A6C3CA04DB; Mon, 28 Sep 2020 18:46:11 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D05221D730; Mon, 28 Sep 2020 18:43:22 +0200 (CEST) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id 517151D6DF for ; Mon, 28 Sep 2020 18:43:16 +0200 (CEST) IronPort-SDR: 1RhQ+P1XGQitzqj2vJjuboAeszXpHL5ymAdQOFcLmHHys/G14ExiMXM1FFIzpSLulZIMz0ASl/ fhC4iS3g8G6w== X-IronPort-AV: E=McAfee;i="6000,8403,9758"; a="223619795" X-IronPort-AV: E=Sophos;i="5.77,313,1596524400"; d="scan'208";a="223619795" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2020 09:43:15 -0700 IronPort-SDR: vEdgHjdNQh02DwLJ15FSNd2kPI1eqkIxxFoXbHabKXkZsQlG6P1/9WS+8DEFXFZXACWgpS5I5u ki0aUurTDFCw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,313,1596524400"; d="scan'208";a="338250519" Received: from silpixa00399126.ir.intel.com ([10.237.222.4]) by fmsmga004.fm.intel.com with ESMTP; 28 Sep 2020 09:43:13 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: patrick.fu@intel.com, Bruce Richardson , Kevin Laatz Date: Mon, 28 Sep 2020 17:42:29 +0100 Message-Id: <20200928164245.84997-10-bruce.richardson@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200928164245.84997-1-bruce.richardson@intel.com> References: <20200721095140.719297-1-bruce.richardson@intel.com> <20200928164245.84997-1-bruce.richardson@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v4 09/25] raw/ioat: make the HW register spec private X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Only a few definitions from the hardware spec are actually used in the driver runtime, so we can copy over those few and make the rest of the spec a private header in the driver. Signed-off-by: Bruce Richardson Reviewed-by: Kevin Laatz --- drivers/raw/ioat/ioat_rawdev.c | 3 ++ .../raw/ioat/{rte_ioat_spec.h => ioat_spec.h} | 26 ----------- drivers/raw/ioat/meson.build | 3 +- drivers/raw/ioat/rte_ioat_rawdev_fns.h | 43 +++++++++++++++++-- 4 files changed, 44 insertions(+), 31 deletions(-) rename drivers/raw/ioat/{rte_ioat_spec.h => ioat_spec.h} (91%) diff --git a/drivers/raw/ioat/ioat_rawdev.c b/drivers/raw/ioat/ioat_rawdev.c index ea9f51ffc1..aa59b731fd 100644 --- a/drivers/raw/ioat/ioat_rawdev.c +++ b/drivers/raw/ioat/ioat_rawdev.c @@ -4,10 +4,12 @@ #include #include +#include #include #include #include "rte_ioat_rawdev.h" +#include "ioat_spec.h" static struct rte_pci_driver ioat_pmd_drv; @@ -268,6 +270,7 @@ ioat_rawdev_create(const char *name, struct rte_pci_device *dev) ioat->rawdev = rawdev; ioat->mz = mz; ioat->regs = dev->mem_resource[0].addr; + ioat->doorbell = &ioat->regs->dmacount; ioat->ring_size = 0; ioat->desc_ring = NULL; ioat->status_addr = ioat->mz->iova + diff --git a/drivers/raw/ioat/rte_ioat_spec.h b/drivers/raw/ioat/ioat_spec.h similarity index 91% rename from drivers/raw/ioat/rte_ioat_spec.h rename to drivers/raw/ioat/ioat_spec.h index c6e7929b2c..9645e16d41 100644 --- a/drivers/raw/ioat/rte_ioat_spec.h +++ b/drivers/raw/ioat/ioat_spec.h @@ -86,32 +86,6 @@ struct rte_ioat_registers { #define RTE_IOAT_CHANCMP_ALIGN 8 /* CHANCMP address must be 64-bit aligned */ -struct rte_ioat_generic_hw_desc { - uint32_t size; - union { - uint32_t control_raw; - struct { - uint32_t int_enable: 1; - uint32_t src_snoop_disable: 1; - uint32_t dest_snoop_disable: 1; - uint32_t completion_update: 1; - uint32_t fence: 1; - uint32_t reserved2: 1; - uint32_t src_page_break: 1; - uint32_t dest_page_break: 1; - uint32_t bundle: 1; - uint32_t dest_dca: 1; - uint32_t hint: 1; - uint32_t reserved: 13; - uint32_t op: 8; - } control; - } u; - uint64_t src_addr; - uint64_t dest_addr; - uint64_t next; - uint64_t op_specific[4]; -}; - struct rte_ioat_dma_hw_desc { uint32_t size; union { diff --git a/drivers/raw/ioat/meson.build b/drivers/raw/ioat/meson.build index f66e9b605e..06636f8a9f 100644 --- a/drivers/raw/ioat/meson.build +++ b/drivers/raw/ioat/meson.build @@ -8,5 +8,4 @@ sources = files('ioat_rawdev.c', deps += ['rawdev', 'bus_pci', 'mbuf'] install_headers('rte_ioat_rawdev.h', - 'rte_ioat_rawdev_fns.h', - 'rte_ioat_spec.h') + 'rte_ioat_rawdev_fns.h') diff --git a/drivers/raw/ioat/rte_ioat_rawdev_fns.h b/drivers/raw/ioat/rte_ioat_rawdev_fns.h index 466721a23a..c6e0b9a586 100644 --- a/drivers/raw/ioat/rte_ioat_rawdev_fns.h +++ b/drivers/raw/ioat/rte_ioat_rawdev_fns.h @@ -8,7 +8,36 @@ #include #include #include -#include "rte_ioat_spec.h" + +/** + * @internal + * Structure representing a device descriptor + */ +struct rte_ioat_generic_hw_desc { + uint32_t size; + union { + uint32_t control_raw; + struct { + uint32_t int_enable: 1; + uint32_t src_snoop_disable: 1; + uint32_t dest_snoop_disable: 1; + uint32_t completion_update: 1; + uint32_t fence: 1; + uint32_t reserved2: 1; + uint32_t src_page_break: 1; + uint32_t dest_page_break: 1; + uint32_t bundle: 1; + uint32_t dest_dca: 1; + uint32_t hint: 1; + uint32_t reserved: 13; + uint32_t op: 8; + } control; + } u; + uint64_t src_addr; + uint64_t dest_addr; + uint64_t next; + uint64_t op_specific[4]; +}; /** * @internal @@ -19,7 +48,7 @@ struct rte_ioat_rawdev { const struct rte_memzone *mz; const struct rte_memzone *desc_mz; - volatile struct rte_ioat_registers *regs; + volatile uint16_t *doorbell; phys_addr_t status_addr; phys_addr_t ring_addr; @@ -40,8 +69,16 @@ struct rte_ioat_rawdev { /* to report completions, the device will write status back here */ volatile uint64_t status __rte_cache_aligned; + + /* pointer to the register bar */ + volatile struct rte_ioat_registers *regs; }; +#define RTE_IOAT_CHANSTS_IDLE 0x1 +#define RTE_IOAT_CHANSTS_SUSPENDED 0x2 +#define RTE_IOAT_CHANSTS_HALTED 0x3 +#define RTE_IOAT_CHANSTS_ARMED 0x4 + /* * Enqueue a copy operation onto the ioat device */ @@ -109,7 +146,7 @@ rte_ioat_perform_ops(int dev_id) ioat->desc_ring[(ioat->next_write - 1) & (ioat->ring_size - 1)].u .control.completion_update = 1; rte_compiler_barrier(); - ioat->regs->dmacount = ioat->next_write; + *ioat->doorbell = ioat->next_write; ioat->started = ioat->enqueued; }