From patchwork Wed Sep 9 01:11:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vimal Chungath X-Patchwork-Id: 76981 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 43D8FA04B1; Wed, 9 Sep 2020 03:11:21 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 050FC1C0BD; Wed, 9 Sep 2020 03:11:17 +0200 (CEST) Received: from smtp-fw-6002.amazon.com (smtp-fw-6002.amazon.com [52.95.49.90]) by dpdk.org (Postfix) with ESMTP id 763181B9B7 for ; Wed, 9 Sep 2020 03:11:14 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1599613874; x=1631149874; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=NTprRRHQn4K6ppD/JtkTzrxKcbwPty+iWsIW4vTLXPw=; b=CX7xyq/y+zPpQDv4D6EYITViBlr4n15RPsfB9PTE2cGWYaeTCWY8Pi98 9p62BDhzz33sHEwTFLpO7xQW43iN8ITV8rtnheEksuiAzjL1HNrP8PanL jJxF+QfMT9ReU5aeaXC29+FMHKboohA0WReSv1zQ3dXwrTyaS1YEmu8dX 4=; X-IronPort-AV: E=Sophos;i="5.76,407,1592870400"; d="scan'208";a="52803533" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO email-inbound-relay-1e-27fb8269.us-east-1.amazon.com) ([10.43.8.6]) by smtp-border-fw-out-6002.iad6.amazon.com with ESMTP; 09 Sep 2020 01:11:13 +0000 Received: from EX13MTAUEA001.ant.amazon.com (iad12-ws-svc-p26-lb9-vlan2.iad.amazon.com [10.40.163.34]) by email-inbound-relay-1e-27fb8269.us-east-1.amazon.com (Postfix) with ESMTPS id 8E3ECA1E41; Wed, 9 Sep 2020 01:11:13 +0000 (UTC) Received: from EX13D04UEA004.ant.amazon.com (10.43.61.130) by EX13MTAUEA001.ant.amazon.com (10.43.61.82) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 9 Sep 2020 01:11:13 +0000 Received: from EX13MTAUEA001.ant.amazon.com (10.43.61.82) by EX13D04UEA004.ant.amazon.com (10.43.61.130) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 9 Sep 2020 01:11:13 +0000 Received: from dev-dsk-vcchunga-2a-c5-3b7a0bed.us-west-2.amazon.com (172.19.55.163) by mail-relay.amazon.com (10.43.61.243) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 9 Sep 2020 01:11:12 +0000 Received: by dev-dsk-vcchunga-2a-c5-3b7a0bed.us-west-2.amazon.com (Postfix, from userid 6361087) id A3F96A009F; Tue, 8 Sep 2020 18:11:12 -0700 (PDT) From: Vimal Chungath To: CC: Date: Tue, 8 Sep 2020 18:11:08 -0700 Message-ID: <20200909011109.2048-2-vcchunga@amazon.com> X-Mailer: git-send-email 2.16.6 In-Reply-To: <20200909011109.2048-1-vcchunga@amazon.com> References: <20200909011109.2048-1-vcchunga@amazon.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH 1/2] config: add Graviton2(arm64) meson configuration X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add meson build configuration for Graviton2 platform with 64-bit ARM Neoverse N1 cores. This patch makes the following changes to generic Neoverse N1 config: 1. increase lcore limit to 64 2. increase memory support to 1TB 3. remove +crc from -march as that is default when setting armv8.2 For more information about Graviton2 platform, refer to: https://aws.amazon.com/ec2/graviton/ Signed-off-by: Vimal Chungath --- config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++ config/arm/meson.build | 12 +++++++++++- 2 files changed, 28 insertions(+), 1 deletion(-) create mode 100644 config/arm/arm64_graviton2_linux_gcc diff --git a/config/arm/arm64_graviton2_linux_gcc b/config/arm/arm64_graviton2_linux_gcc new file mode 100644 index 000000000..022e06303 --- /dev/null +++ b/config/arm/arm64_graviton2_linux_gcc @@ -0,0 +1,17 @@ +[binaries] +c = 'aarch64-linux-gnu-gcc' +cpp = 'aarch64-linux-gnu-cpp' +ar = 'aarch64-linux-gnu-gcc-ar' +strip = 'aarch64-linux-gnu-strip' +pkgconfig = 'aarch64-linux-gnu-pkg-config' +pcap-config = '' + +[host_machine] +system = 'linux' +cpu_family = 'aarch64' +cpu = 'armv8-a' +endian = 'little' + +[properties] +implementor_id = '0x41' +implementor_pn = '0xd0c' diff --git a/config/arm/meson.build b/config/arm/meson.build index 8728051d5..64e277ebc 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -86,6 +86,16 @@ flags_octeontx2_extra = [ ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_EAL_IGB_UIO', false], ['RTE_USE_C11_MEM_MODEL', true]] +flags_n1generic_extra = [ + ['RTE_MACHINE', '"neoverse-n1"'], + ['RTE_MAX_LCORE', 64], + ['RTE_CACHE_LINE_SIZE', 64], + ['RTE_ARM_FEATURE_ATOMICS', true], + ['RTE_USE_C11_MEM_MODEL', true], + ['RTE_MAX_MEM_MB', 1048576], + ['RTE_MAX_NUMA_NODES', 1], + ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false], + ['RTE_LIBRTE_VHOST_NUMA', false]] machine_args_generic = [ ['default', ['-march=armv8-a+crc']], @@ -97,7 +107,7 @@ machine_args_generic = [ ['0xd09', ['-mcpu=cortex-a73']], ['0xd0a', ['-mcpu=cortex-a75']], ['0xd0b', ['-mcpu=cortex-a76']], - ['0xd0c', ['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'], flags_n1sdp_extra]] + ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'], flags_n1generic_extra]] machine_args_cavium = [ ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],