diff mbox series

[v2,02/17] eal: add default SIMD bitwidth values

Message ID	20200827161304.32300-3-ciara.power@intel.com (mailing list archive)
State	Superseded, archived
Delegated to:	David Marchand
Headers	IronPort-SDR: IU6OZvw/xGs+bwx0K08VTHWywdlmQqBoxONigQ9gWeqLlyhSK6DTBWp3wCHP6Cx81YgenHUzrt 6sslT3QEZDMw== IronPort-SDR: 6b4fTcO4BdcnuCug6/uUtxSzSQbxRfk4OHYm+2UKGGExW8PHHoRTJUbyuYc7MHsa8JgrjZyO62 Tr7R3OB8D2Wg== From: Ciara Power <ciara.power@intel.com> To: dev@dpdk.org Cc: Ciara Power <ciara.power@intel.com>, Ruifeng Wang <ruifeng.wang@arm.com>, Jerin Jacob <jerinj@marvell.com>, Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>, David Christensen <drc@linux.vnet.ibm.com>, Jan Viktorin <viktorin@rehivetech.com>, Bruce Richardson <bruce.richardson@intel.com>, Konstantin Ananyev <konstantin.ananyev@intel.com> Date: Thu, 27 Aug 2020 17:12:49 +0100 Message-Id: <20200827161304.32300-3-ciara.power@intel.com> In-Reply-To: <20200827161304.32300-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 02/17] eal: add default SIMD bitwidth values Precedence: list Errors-To: dev-bounces@dpdk.org Sender: "dev" <dev-bounces@dpdk.org>
Series	add max SIMD bitwidth to EAL \| [v2,00/17] add max SIMD bitwidth to EAL [v2,01/17] eal: add max SIMD bitwidth [v2,02/17] eal: add default SIMD bitwidth values [v2,03/17] doc: add detail on using max SIMD bitwidth [v2,04/17] net/i40e: add checks for max SIMD bitwidth [v2,05/17] net/axgbe: add checks for max SIMD bitwidth [v2,06/17] net/bnxt: add checks for max SIMD bitwidth [v2,07/17] net/enic: add checks for max SIMD bitwidth [v2,08/17] net/fm10k: add checks for max SIMD bitwidth [v2,09/17] net/iavf: add checks for max SIMD bitwidth [v2,10/17] net/ice: add checks for max SIMD bitwidth [v2,11/17] net/ixgbe: add checks for max SIMD bitwidth [v2,12/17] net/mlx5: add checks for max SIMD bitwidth [v2,13/17] net/virtio: add checks for max SIMD bitwidth [v2,14/17] distributor: add checks for max SIMD bitwidth [v2,15/17] member: add checks for max SIMD bitwidth [v2,16/17] efd: add checks for max SIMD bitwidth [v2,17/17] net: add checks for max SIMD bitwidth

Checks

Context	Check	Description
ci/checkpatch	success	coding style OK

Commit Message

Power, Ciara Aug. 27, 2020, 4:12 p.m. UTC

  Each arch has a define for the default SIMD bitwidth value, this is used
on EAL init to set the config max SIMD bitwidth.

Cc: Ruifeng Wang <ruifeng.wang@arm.com>
Cc: Jerin Jacob <jerinj@marvell.com>
Cc: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Cc: David Christensen <drc@linux.vnet.ibm.com>

Signed-off-by: Ciara Power <ciara.power@intel.com>

---
v2: Changed default bitwidth for Arm to 128.
---
 lib/librte_eal/arm/include/rte_vect.h      | 2 ++
 lib/librte_eal/common/eal_common_options.c | 3 +++
 lib/librte_eal/include/generic/rte_vect.h  | 2 ++
 lib/librte_eal/ppc/include/rte_vect.h      | 2 ++
 lib/librte_eal/x86/include/rte_vect.h      | 2 ++
 5 files changed, 11 insertions(+)

Comments

Honnappa Nagarahalli Sept. 4, 2020, 5:30 a.m. UTC | #1

<snip>

> 
> Each arch has a define for the default SIMD bitwidth value, this is used on
> EAL init to set the config max SIMD bitwidth.
> 
> Cc: Ruifeng Wang <ruifeng.wang@arm.com>
> Cc: Jerin Jacob <jerinj@marvell.com>
> Cc: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
> Cc: David Christensen <drc@linux.vnet.ibm.com>
> 
> Signed-off-by: Ciara Power <ciara.power@intel.com>
> 
> ---
> v2: Changed default bitwidth for Arm to 128.
Thanks for this change.
Continuing the discussion from V1, for SVE (Scalable Vector Extensions - code is vector width agnostic, allowing the same binary to run on multiple platforms with different vector width), I am thinking we should add a default value which we could use on Arm platforms to identify the choice.
I have added some comments in 1/17.

> ---
>  lib/librte_eal/arm/include/rte_vect.h      | 2 ++
>  lib/librte_eal/common/eal_common_options.c | 3 +++
> lib/librte_eal/include/generic/rte_vect.h  | 2 ++
>  lib/librte_eal/ppc/include/rte_vect.h      | 2 ++
>  lib/librte_eal/x86/include/rte_vect.h      | 2 ++
>  5 files changed, 11 insertions(+)
> 
> diff --git a/lib/librte_eal/arm/include/rte_vect.h
> b/lib/librte_eal/arm/include/rte_vect.h
> index 01c51712a1..2cd61d6279 100644
> --- a/lib/librte_eal/arm/include/rte_vect.h
> +++ b/lib/librte_eal/arm/include/rte_vect.h
> @@ -14,6 +14,8 @@
>  extern "C" {
>  #endif
> 
> +#define RTE_DEFAULT_SIMD_BITWIDTH 128
> +
>  typedef int32x4_t xmm_t;
> 
>  #define	XMM_SIZE	(sizeof(xmm_t))
> diff --git a/lib/librte_eal/common/eal_common_options.c
> b/lib/librte_eal/common/eal_common_options.c
> index 90f4e8f5c3..c2a9624f89 100644
> --- a/lib/librte_eal/common/eal_common_options.c
> +++ b/lib/librte_eal/common/eal_common_options.c
> @@ -35,6 +35,7 @@
>  #ifndef RTE_EXEC_ENV_WINDOWS
>  #include <rte_telemetry.h>
>  #endif
> +#include <rte_vect.h>
> 
>  #include "eal_internal_cfg.h"
>  #include "eal_options.h"
> @@ -344,6 +345,8 @@ eal_reset_internal_config(struct internal_config
> *internal_cfg)
>  	internal_cfg->user_mbuf_pool_ops_name = NULL;
>  	CPU_ZERO(&internal_cfg->ctrl_cpuset);
>  	internal_cfg->init_complete = 0;
> +	internal_cfg->max_simd_bitwidth.bitwidth =
> RTE_DEFAULT_SIMD_BITWIDTH;
> +	internal_cfg->max_simd_bitwidth.locked = 0;
>  }
> 
>  static int
> diff --git a/lib/librte_eal/include/generic/rte_vect.h
> b/lib/librte_eal/include/generic/rte_vect.h
> index 3fc47979f8..e98f184a97 100644
> --- a/lib/librte_eal/include/generic/rte_vect.h
> +++ b/lib/librte_eal/include/generic/rte_vect.h
> @@ -14,6 +14,8 @@
> 
>  #include <stdint.h>
> 
> +#define RTE_DEFAULT_SIMD_BITWIDTH 256
> +
>  /* Unsigned vector types */
> 
>  /**
> diff --git a/lib/librte_eal/ppc/include/rte_vect.h
> b/lib/librte_eal/ppc/include/rte_vect.h
> index b0545c878c..70fbd0c423 100644
> --- a/lib/librte_eal/ppc/include/rte_vect.h
> +++ b/lib/librte_eal/ppc/include/rte_vect.h
> @@ -15,6 +15,8 @@
>  extern "C" {
>  #endif
> 
> +#define RTE_DEFAULT_SIMD_BITWIDTH 256
> +
>  typedef vector signed int xmm_t;
> 
>  #define	XMM_SIZE	(sizeof(xmm_t))
> diff --git a/lib/librte_eal/x86/include/rte_vect.h
> b/lib/librte_eal/x86/include/rte_vect.h
> index df5a607623..b1df75aca7 100644
> --- a/lib/librte_eal/x86/include/rte_vect.h
> +++ b/lib/librte_eal/x86/include/rte_vect.h
> @@ -35,6 +35,8 @@
>  extern "C" {
>  #endif
> 
> +#define RTE_DEFAULT_SIMD_BITWIDTH 256
> +
>  typedef __m128i xmm_t;
> 
>  #define	XMM_SIZE	(sizeof(xmm_t))
> --
> 2.17.1

diff mbox series

Patch

diff --git a/lib/librte_eal/arm/include/rte_vect.h b/lib/librte_eal/arm/include/rte_vect.h
index 01c51712a1..2cd61d6279 100644
--- a/lib/librte_eal/arm/include/rte_vect.h
+++ b/lib/librte_eal/arm/include/rte_vect.h
@@ -14,6 +14,8 @@ 
 extern "C" {
 #endif
 
+#define RTE_DEFAULT_SIMD_BITWIDTH 128
+
 typedef int32x4_t xmm_t;
 
 #define	XMM_SIZE	(sizeof(xmm_t))
diff --git a/lib/librte_eal/common/eal_common_options.c b/lib/librte_eal/common/eal_common_options.c
index 90f4e8f5c3..c2a9624f89 100644
--- a/lib/librte_eal/common/eal_common_options.c
+++ b/lib/librte_eal/common/eal_common_options.c
@@ -35,6 +35,7 @@ 
 #ifndef RTE_EXEC_ENV_WINDOWS
 #include <rte_telemetry.h>
 #endif
+#include <rte_vect.h>
 
 #include "eal_internal_cfg.h"
 #include "eal_options.h"
@@ -344,6 +345,8 @@  eal_reset_internal_config(struct internal_config *internal_cfg)
 	internal_cfg->user_mbuf_pool_ops_name = NULL;
 	CPU_ZERO(&internal_cfg->ctrl_cpuset);
 	internal_cfg->init_complete = 0;
+	internal_cfg->max_simd_bitwidth.bitwidth = RTE_DEFAULT_SIMD_BITWIDTH;
+	internal_cfg->max_simd_bitwidth.locked = 0;
 }
 
 static int
diff --git a/lib/librte_eal/include/generic/rte_vect.h b/lib/librte_eal/include/generic/rte_vect.h
index 3fc47979f8..e98f184a97 100644
--- a/lib/librte_eal/include/generic/rte_vect.h
+++ b/lib/librte_eal/include/generic/rte_vect.h
@@ -14,6 +14,8 @@ 
 
 #include <stdint.h>
 
+#define RTE_DEFAULT_SIMD_BITWIDTH 256
+
 /* Unsigned vector types */
 
 /**
diff --git a/lib/librte_eal/ppc/include/rte_vect.h b/lib/librte_eal/ppc/include/rte_vect.h
index b0545c878c..70fbd0c423 100644
--- a/lib/librte_eal/ppc/include/rte_vect.h
+++ b/lib/librte_eal/ppc/include/rte_vect.h
@@ -15,6 +15,8 @@ 
 extern "C" {
 #endif
 
+#define RTE_DEFAULT_SIMD_BITWIDTH 256
+
 typedef vector signed int xmm_t;
 
 #define	XMM_SIZE	(sizeof(xmm_t))
diff --git a/lib/librte_eal/x86/include/rte_vect.h b/lib/librte_eal/x86/include/rte_vect.h
index df5a607623..b1df75aca7 100644
--- a/lib/librte_eal/x86/include/rte_vect.h
+++ b/lib/librte_eal/x86/include/rte_vect.h
@@ -35,6 +35,8 @@ 
 extern "C" {
 #endif
 
+#define RTE_DEFAULT_SIMD_BITWIDTH 256
+
 typedef __m128i xmm_t;
 
 #define	XMM_SIZE	(sizeof(xmm_t))