@@ -383,6 +383,11 @@ CONFIG_RTE_LIBRTE_MLX5_REGEX_PMD=n
#
CONFIG_RTE_LIBRTE_MLX5_VDPA_PMD=n
+#
+# Compile compress-oriented Mellanox BlueField2 (MLX5) PMD
+#
+CONFIG_RTE_LIBRTE_MLX5_COMPRESS_PMD=n
+
# Linking method for mlx4/5 dependency on ibverbs and related libraries
# Default linking is dynamic by linker.
# Other options are: dynamic by dlopen at run-time, or statically embedded.
@@ -21,7 +21,7 @@ DEPDIRS-crypto := common bus mempool
DIRS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += common/qat
DEPDIRS-common/qat := bus mempool
DIRS-$(CONFIG_RTE_LIBRTE_COMPRESSDEV) += compress
-DEPDIRS-compress := bus mempool
+DEPDIRS-compress := common bus mempool common/mlx5
DIRS-$(CONFIG_RTE_LIBRTE_REGEXDEV) += regex
DEPDIRS-regex := common bus common/mlx5
DIRS-$(CONFIG_RTE_LIBRTE_VHOST) += vdpa
@@ -10,7 +10,7 @@ LIB_GLUE_BASE = librte_pmd_mlx5_glue.so
LIB_GLUE_VERSION = 20.02.0
# Sources.
-ifeq ($(findstring y,$(CONFIG_RTE_LIBRTE_MLX5_PMD)$(CONFIG_RTE_LIBRTE_MLX5_VDPA_PMD)$(CONFIG_RTE_LIBRTE_MLX5_REGEX_PMD)),y)
+ifeq ($(findstring y,$(CONFIG_RTE_LIBRTE_MLX5_PMD)$(CONFIG_RTE_LIBRTE_MLX5_VDPA_PMD)$(CONFIG_RTE_LIBRTE_MLX5_REGEX_PMD)$(CONFIG_RTE_LIBRTE_MLX5_COMPRESS_PMD)),y)
ifneq ($(CONFIG_RTE_IBVERBS_LINK_DLOPEN),y)
SRCS-y += linux/mlx5_glue.c
endif
@@ -372,7 +372,7 @@ mlx5_autoconf.h: mlx5_autoconf.h.new
cmp '$<' '$@' $(AUTOCONF_OUTPUT) || \
mv '$<' '$@'
-ifeq ($(findstring y,$(CONFIG_RTE_LIBRTE_MLX5_PMD)$(CONFIG_RTE_LIBRTE_MLX5_VDPA_PMD)$(CONFIG_RTE_LIBRTE_MLX5_REGEX_PMD)),y)
+ifeq ($(findstring y,$(CONFIG_RTE_LIBRTE_MLX5_PMD)$(CONFIG_RTE_LIBRTE_MLX5_VDPA_PMD)$(CONFIG_RTE_LIBRTE_MLX5_REGEX_PMD)$(CONFIG_RTE_LIBRTE_MLX5_COMPRESS_PMD)),y)
$(SRCS-y:.c=.o): mlx5_autoconf.h
endif
@@ -213,6 +213,7 @@ enum mlx5_class {
MLX5_CLASS_NET = RTE_BIT64(0),
MLX5_CLASS_VDPA = RTE_BIT64(1),
MLX5_CLASS_REGEX = RTE_BIT64(2),
+ MLX5_CLASS_COMPRESS = RTE_BIT64(3),
};
#define MLX5_DBR_SIZE RTE_CACHE_LINE_SIZE
@@ -28,14 +28,21 @@ static TAILQ_HEAD(mlx5_pci_devices_head, mlx5_pci_device) devices_list =
{ .name = "vdpa", .driver_class = MLX5_CLASS_VDPA },
{ .name = "net", .driver_class = MLX5_CLASS_NET },
{ .name = "regex", .driver_class = MLX5_CLASS_REGEX },
+ { .name = "compress", .driver_class = MLX5_CLASS_COMPRESS },
};
static const unsigned int mlx5_class_combinations[] = {
MLX5_CLASS_NET,
MLX5_CLASS_VDPA,
MLX5_CLASS_REGEX,
+ MLX5_CLASS_COMPRESS,
MLX5_CLASS_NET | MLX5_CLASS_REGEX,
MLX5_CLASS_VDPA | MLX5_CLASS_REGEX,
+ MLX5_CLASS_NET | MLX5_CLASS_COMPRESS,
+ MLX5_CLASS_VDPA | MLX5_CLASS_COMPRESS,
+ MLX5_CLASS_REGEX | MLX5_CLASS_COMPRESS,
+ MLX5_CLASS_NET | MLX5_CLASS_REGEX | MLX5_CLASS_COMPRESS,
+ MLX5_CLASS_VDPA | MLX5_CLASS_REGEX | MLX5_CLASS_COMPRESS,
/* New class combination should be added here. */
};
@@ -9,26 +9,26 @@
* @file
*
* RTE Mellanox PCI Driver Interface
- * Mellanox ConnectX PCI device supports multiple class (net/vdpa/regex)
- * devices. This layer enables creating such multiple class of devices on a
- * single PCI device by allowing to bind multiple class specific device
+ * Mellanox ConnectX PCI device supports multiple class: net,vdpa,regex and
+ * compress devices. This layer enables creating such multiple class of devices
+ * on a single PCI device by allowing to bind multiple class specific device
* driver to attach to mlx5_pci driver.
*
- * ----------- ------------ -------------
- * | mlx5 | | mlx5 | | mlx5 |
- * | net pmd | | vdpa pmd | | regex pmd |
- * ----------- ------------ -------------
- * \ | /
- * \ | /
- * \ -------------- /
- * \______| mlx5 |_____ /
- * | pci common |
- * --------------
- * |
- * -----------
- * | mlx5 |
- * | pci dev |
- * -----------
+ * ----------- ------------ ------------- ----------------
+ * | mlx5 | | mlx5 | | mlx5 | | mlx5 |
+ * | net pmd | | vdpa pmd | | regex pmd | | compress pmd |
+ * ----------- ------------ ------------- ----------------
+ * \ \ / /
+ * \ \ / /
+ * \ \_--------------_/ /
+ * \_______________| mlx5 |_______________/
+ * | pci common |
+ * --------------
+ * |
+ * -----------
+ * | mlx5 |
+ * | pci dev |
+ * -----------
*
* - mlx5 pci driver binds to mlx5 PCI devices defined by PCI
* ID table of all related mlx5 PCI devices.
@@ -6,5 +6,7 @@ include $(RTE_SDK)/mk/rte.vars.mk
DIRS-$(CONFIG_RTE_LIBRTE_PMD_ISAL) += isal
DIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_ZIPVF) += octeontx
DIRS-$(CONFIG_RTE_LIBRTE_PMD_ZLIB) += zlib
+DIRS-$(CONFIG_RTE_LIBRTE_MLX5_COMPRESS_PMD) += mlx5
+
include $(RTE_SDK)/mk/rte.subdir.mk
@@ -5,7 +5,7 @@ if is_windows
subdir_done()
endif
-drivers = ['isal', 'octeontx', 'qat', 'zlib']
+drivers = ['isal', 'octeontx', 'qat', 'zlib', 'mlx5']
std_deps = ['compressdev'] # compressdev pulls in all other needed deps
config_flag_fmt = 'RTE_LIBRTE_@0@_PMD'
new file mode 100644
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright 2020 Mellanox Technologies, Ltd
+
+include $(RTE_SDK)/mk/rte.vars.mk
+
+# Library name.
+LIB = librte_pmd_mlx5_compress.a
+
+# Sources.
+SRCS-$(CONFIG_RTE_LIBRTE_MLX5_COMPRESS_PMD) += mlx5_compress.c
+
+# Basic CFLAGS.
+CFLAGS += -O3
+CFLAGS += -std=c11 -Wall -Wextra
+CFLAGS += -g
+CFLAGS += -I$(RTE_SDK)/drivers/common/mlx5
+CFLAGS += -I$(BUILDDIR)/drivers/common/mlx5
+CFLAGS += -I$(RTE_SDK)/drivers/common/mlx5/linux
+CFLAGS += -I$(BUILDDIR)/drivers/common/mlx5/linux
+CFLAGS += -D_BSD_SOURCE
+CFLAGS += -D_DEFAULT_SOURCE
+CFLAGS += -D_XOPEN_SOURCE=600
+CFLAGS += $(WERROR_FLAGS)
+CFLAGS += -Wno-strict-prototypes
+LDLIBS += -lrte_common_mlx5
+LDLIBS += -lm
+LDLIBS += -lrte_eal -lrte_mbuf -lrte_compressdiev
+LDLIBS += -lrte_kvargs
+LDLIBS += -lrte_bus_pci
+LDLIBS += -lrte_pci
+
+# A few warnings cannot be avoided in external headers.
+CFLAGS += -Wno-error=cast-qual
+
+EXPORT_MAP := rte_pmd_mlx5_compress_version.map
+
+include $(RTE_SDK)/mk/rte.lib.mk
new file mode 100644
@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright 2020 Mellanox Technologies, Ltd
+
+if not is_linux
+ build = false
+ reason = 'only supported on Linux'
+ subdir_done()
+endif
+
+fmt_name = 'mlx5_compress'
+deps += ['common_mlx5', 'eal', 'compressdev']
+sources = files(
+ 'mlx5_compress.c',
+)
+cflags_options = [
+ '-std=c11',
+ '-Wno-strict-prototypes',
+ '-D_BSD_SOURCE',
+ '-D_DEFAULT_SOURCE',
+ '-D_XOPEN_SOURCE=600'
+]
+foreach option:cflags_options
+ if cc.has_argument(option)
+ cflags += option
+ endif
+endforeach
new file mode 100644
@@ -0,0 +1,292 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2020 Mellanox Technologies, Ltd
+ */
+
+#include <rte_malloc.h>
+#include <rte_log.h>
+#include <rte_errno.h>
+#include <rte_pci.h>
+#include <rte_comp.h>
+#include <rte_compressdev.h>
+#include <rte_compressdev_pmd.h>
+
+#include <mlx5_glue.h>
+#include <mlx5_common.h>
+#include <mlx5_common_pci.h>
+#include <mlx5_devx_cmds.h>
+#include <mlx5_prm.h>
+
+#include "mlx5_compress_utils.h"
+
+#define MLX5_COMPRESS_DRIVER_NAME mlx5_compress
+#define MLX5_COMPRESS_LOG_NAME pmd.compress.mlx5
+
+struct mlx5_compress_priv {
+ TAILQ_ENTRY(mlx5_compress_priv) next;
+ struct ibv_context *ctx; /* Device context. */
+ struct rte_pci_device *pci_dev;
+ struct rte_compressdev *cdev;
+ struct mlx5dv_devx_uar *uar;
+ uint32_t eqn;
+ uint32_t pdn; /* Protection Domain number. */
+ struct ibv_pd *pd;
+};
+
+TAILQ_HEAD(mlx5_compress_privs, mlx5_compress_priv) mlx5_compress_priv_list =
+ TAILQ_HEAD_INITIALIZER(mlx5_compress_priv_list);
+static pthread_mutex_t priv_list_lock = PTHREAD_MUTEX_INITIALIZER;
+
+int mlx5_compress_logtype;
+
+static struct rte_compressdev_ops mlx5_compress_ops = {
+ .dev_configure = NULL,
+ .dev_start = NULL,
+ .dev_stop = NULL,
+ .dev_close = NULL,
+ .dev_infos_get = NULL,
+ .stats_get = NULL,
+ .stats_reset = NULL,
+ .queue_pair_setup = NULL,
+ .queue_pair_release = NULL,
+ .private_xform_create = NULL,
+ .private_xform_free = NULL,
+ .stream_create = NULL,
+ .stream_free = NULL,
+};
+
+static struct ibv_device *
+mlx5_compress_get_ib_device_match(struct rte_pci_addr *addr)
+{
+ int n;
+ struct ibv_device **ibv_list = mlx5_glue->get_device_list(&n);
+ struct ibv_device *ibv_match = NULL;
+
+ if (!ibv_list) {
+ rte_errno = ENOSYS;
+ return NULL;
+ }
+ while (n-- > 0) {
+ struct rte_pci_addr pci_addr;
+
+ DRV_LOG(DEBUG, "Checking device \"%s\"..", ibv_list[n]->name);
+ if (mlx5_dev_to_pci_addr(ibv_list[n]->ibdev_path, &pci_addr))
+ continue;
+ if (rte_pci_addr_cmp(addr, &pci_addr))
+ continue;
+ ibv_match = ibv_list[n];
+ break;
+ }
+ if (!ibv_match)
+ rte_errno = ENOENT;
+ mlx5_glue->free_device_list(ibv_list);
+ return ibv_match;
+}
+
+static void
+mlx5_compress_hw_global_release(struct mlx5_compress_priv *priv)
+{
+ if (priv->pd) {
+ mlx5_glue->dealloc_pd(priv->pd);
+ priv->pd = NULL;
+ }
+ if (priv->uar) {
+ mlx5_glue->devx_free_uar(priv->uar);
+ priv->uar = NULL;
+ }
+ priv->eqn = 0;
+}
+
+static int
+mlx5_compress_pd_create(struct mlx5_compress_priv *priv)
+{
+#ifdef HAVE_IBV_FLOW_DV_SUPPORT
+ priv->pd = mlx5_glue->alloc_pd(priv->ctx);
+ if (priv->pd == NULL) {
+ DRV_LOG(ERR, "Failed to allocate PD.");
+ return errno ? -errno : -ENOMEM;
+ }
+ struct mlx5dv_obj obj;
+ struct mlx5dv_pd pd_info;
+ int ret = 0;
+
+ obj.pd.in = priv->pd;
+ obj.pd.out = &pd_info;
+ ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
+ if (ret) {
+ DRV_LOG(ERR, "Fail to get PD object info.");
+ mlx5_glue->dealloc_pd(priv->pd);
+ priv->pd = NULL;
+ return -errno;
+ }
+ priv->pdn = pd_info.pdn;
+ return 0;
+#else
+ (void)priv;
+ DRV_LOG(ERR, "Cannot get pdn - no DV support.");
+ return -ENOTSUP;
+#endif /* HAVE_IBV_FLOW_DV_SUPPORT */
+}
+
+static int
+mlx5_compress_hw_global_prepare(struct mlx5_compress_priv *priv)
+{
+ if (mlx5_glue->devx_query_eqn(priv->ctx, 0, &priv->eqn)) {
+ rte_errno = errno;
+ DRV_LOG(ERR, "Failed to query EQ number %d.", rte_errno);
+ return -1;
+ }
+ if (mlx5_compress_pd_create(priv))
+ return -1;
+ priv->uar = mlx5_glue->devx_alloc_uar(priv->ctx, 0);
+ if (!priv->uar) {
+ rte_errno = errno;
+ mlx5_glue->dealloc_pd(priv->pd);
+ DRV_LOG(ERR, "Failed to allocate UAR.");
+ return -1;
+ }
+ return 0;
+}
+
+/**
+ * DPDK callback to register a PCI device.
+ *
+ * This function spawns compress device out of a given PCI device.
+ *
+ * @param[in] pci_drv
+ * PCI driver structure (mlx5_compress_driver).
+ * @param[in] pci_dev
+ * PCI device information.
+ *
+ * @return
+ * 0 on success, 1 to skip this driver, a negative errno value otherwise
+ * and rte_errno is set.
+ */
+static int
+mlx5_compress_pci_probe(struct rte_pci_driver *pci_drv,
+ struct rte_pci_device *pci_dev)
+{
+ struct ibv_device *ibv;
+ struct rte_compressdev *cdev;
+ struct ibv_context *ctx;
+ struct mlx5_compress_priv *priv;
+ struct rte_compressdev_pmd_init_params init_params = {
+ .name = "",
+ .socket_id = pci_dev->device.numa_node,
+ };
+
+ RTE_SET_USED(pci_drv);
+ ibv = mlx5_compress_get_ib_device_match(&pci_dev->addr);
+ if (!ibv) {
+ DRV_LOG(ERR, "No matching IB device for PCI slot "
+ PCI_PRI_FMT ".", pci_dev->addr.domain,
+ pci_dev->addr.bus, pci_dev->addr.devid,
+ pci_dev->addr.function);
+ return -rte_errno;
+ } else {
+ DRV_LOG(INFO, "PCI information matches for device \"%s\".",
+ ibv->name);
+ }
+ ctx = mlx5_glue->dv_open_device(ibv);
+ if (!ctx) {
+ DRV_LOG(ERR, "Failed to open IB device \"%s\".", ibv->name);
+ rte_errno = ENODEV;
+ return -rte_errno;
+ }
+ /* TODO: Add capability check. */
+ cdev = rte_compressdev_pmd_create(ibv->name, &pci_dev->device,
+ sizeof(*priv), &init_params);
+ if (cdev == NULL) {
+ DRV_LOG(ERR, "Failed to create device \"%s\".", ibv->name);
+ mlx5_glue->close_device(ctx);
+ return -ENODEV;
+ }
+ DRV_LOG(INFO,
+ "Compress device %s was created successfully.", ibv->name);
+ cdev->dev_ops = &mlx5_compress_ops;
+ cdev->dequeue_burst = NULL;
+ cdev->enqueue_burst = NULL;
+ cdev->feature_flags = RTE_COMPDEV_FF_HW_ACCELERATED;
+ priv = cdev->data->dev_private;
+ priv->ctx = ctx;
+ priv->pci_dev = pci_dev;
+ priv->cdev = cdev;
+ if (mlx5_compress_hw_global_prepare(priv)) {
+ rte_compressdev_pmd_destroy(priv->cdev);
+ mlx5_glue->close_device(priv->ctx);
+ return -1;
+ }
+ pthread_mutex_lock(&priv_list_lock);
+ TAILQ_INSERT_TAIL(&mlx5_compress_priv_list, priv, next);
+ pthread_mutex_unlock(&priv_list_lock);
+ return 0;
+}
+
+/**
+ * DPDK callback to remove a PCI device.
+ *
+ * This function removes all compress devices belong to a given PCI device.
+ *
+ * @param[in] pci_dev
+ * Pointer to the PCI device.
+ *
+ * @return
+ * 0 on success, the function cannot fail.
+ */
+static int
+mlx5_compress_pci_remove(struct rte_pci_device *pci_dev)
+{
+ struct mlx5_compress_priv *priv = NULL;
+ int found = 0;
+
+ pthread_mutex_lock(&priv_list_lock);
+ TAILQ_FOREACH(priv, &mlx5_compress_priv_list, next) {
+ if (!rte_pci_addr_cmp(&priv->pci_dev->addr, &pci_dev->addr)) {
+ found = 1;
+ break;
+ }
+ }
+ if (found)
+ TAILQ_REMOVE(&mlx5_compress_priv_list, priv, next);
+ pthread_mutex_unlock(&priv_list_lock);
+ if (found) {
+ mlx5_compress_hw_global_release(priv);
+ rte_compressdev_pmd_destroy(priv->cdev);
+ mlx5_glue->close_device(priv->ctx);
+ }
+ return 0;
+}
+
+static const struct rte_pci_id mlx5_compress_pci_id_map[] = {
+ {
+ RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
+ PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF)
+ },
+ {
+ .vendor_id = 0
+ }
+};
+
+static struct mlx5_pci_driver mlx5_compress_driver = {
+ .driver_class = MLX5_CLASS_COMPRESS,
+ .pci_driver = {
+ .driver = {
+ .name = RTE_STR(MLX5_COMPRESS_DRIVER_NAME),
+ },
+ .id_table = mlx5_compress_pci_id_map,
+ .probe = mlx5_compress_pci_probe,
+ .remove = mlx5_compress_pci_remove,
+ .drv_flags = 0,
+ },
+};
+
+RTE_INIT(rte_mlx5_compress_init)
+{
+ mlx5_common_init();
+ if (mlx5_glue)
+ mlx5_pci_driver_register(&mlx5_compress_driver);
+}
+
+RTE_LOG_REGISTER(mlx5_compress_logtype, MLX5_COMPRESS_LOG_NAME, NOTICE)
+RTE_PMD_EXPORT_NAME(MLX5_COMPRESS_DRIVER_NAME, __COUNTER__);
+RTE_PMD_REGISTER_PCI_TABLE(MLX5_COMPRESS_DRIVER_NAME, mlx5_compress_pci_id_map);
+RTE_PMD_REGISTER_KMOD_DEP(MLX5_COMPRESS_DRIVER_NAME, "* ib_uverbs & mlx5_core & mlx5_ib");
new file mode 100644
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2020 Mellanox Technologies, Ltd
+ */
+
+#ifndef RTE_PMD_MLX5_COMPRESS_UTILS_H_
+#define RTE_PMD_MLX5_COMPRESS_UTILS_H_
+
+#include <mlx5_common.h>
+
+
+extern int mlx5_compress_logtype;
+
+#define MLX5_COMPRESS_LOG_PREFIX "mlx5_compress"
+/* Generic printf()-like logging macro with automatic line feed. */
+#define DRV_LOG(level, ...) \
+ PMD_DRV_LOG_(level, mlx5_compress_logtype, MLX5_COMPRESS_LOG_PREFIX, \
+ __VA_ARGS__ PMD_DRV_LOG_STRIP PMD_DRV_LOG_OPAREN, \
+ PMD_DRV_LOG_CPAREN)
+
+#endif /* RTE_PMD_MLX5_COMPRESS_UTILS_H_ */
new file mode 100644
@@ -0,0 +1,3 @@
+DPDK_21 {
+ local: *;
+};
@@ -202,12 +202,13 @@ endif
_LDLIBS-$(CONFIG_RTE_LIBRTE_LIO_PMD) += -lrte_pmd_lio
_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_MEMIF) += -lrte_pmd_memif
_LDLIBS-$(CONFIG_RTE_LIBRTE_MLX4_PMD) += -lrte_pmd_mlx4
-ifeq ($(findstring y,$(CONFIG_RTE_LIBRTE_MLX5_PMD)$(CONFIG_RTE_LIBRTE_MLX5_VDPA_PMD)$(CONFIG_RTE_LIBRTE_MLX5_REGEX_PMD)),y)
+ifeq ($(findstring y,$(CONFIG_RTE_LIBRTE_MLX5_PMD)$(CONFIG_RTE_LIBRTE_MLX5_VDPA_PMD)$(CONFIG_RTE_LIBRTE_MLX5_REGEX_PMD)$(CONFIG_RTE_LIBRTE_MLX5_COMPRESS_PMD)),y)
_LDLIBS-y += -lrte_common_mlx5
endif
_LDLIBS-$(CONFIG_RTE_LIBRTE_MLX5_PMD) += -lrte_pmd_mlx5
_LDLIBS-$(CONFIG_RTE_LIBRTE_MLX5_VDPA_PMD) += -lrte_pmd_mlx5_vdpa
_LDLIBS-$(CONFIG_RTE_LIBRTE_MLX5_REGEX_PMD) += -lrte_pmd_mlx5_regex
+_LDLIBS-$(CONFIG_RTE_LIBRTE_MLX5_COMPRESS_PMD) += -lrte_pmd_mlx5_compress
ifeq ($(CONFIG_RTE_IBVERBS_LINK_DLOPEN),y)
_LDLIBS-y += -ldl
else ifeq ($(CONFIG_RTE_IBVERBS_LINK_STATIC),y)
@@ -216,7 +217,7 @@ _LDLIBS-y += --no-whole-archive
_LDLIBS-y += $(LIBS_IBVERBS_STATIC)
_LDLIBS-y += --whole-archive
else
-ifeq ($(findstring y,$(CONFIG_RTE_LIBRTE_MLX5_PMD)$(CONFIG_RTE_LIBRTE_MLX5_VDPA_PMD)$(CONFIG_RTE_LIBRTE_MLX5_REGEX_PMD)),y)
+ifeq ($(findstring y,$(CONFIG_RTE_LIBRTE_MLX5_PMD)$(CONFIG_RTE_LIBRTE_MLX5_VDPA_PMD)$(CONFIG_RTE_LIBRTE_MLX5_REGEX_PMD)$(CONFIG_RTE_LIBRTE_MLX5_COMPRESS_PMD)),y)
_LDLIBS-y += -libverbs -lmlx5
endif
_LDLIBS-$(CONFIG_RTE_LIBRTE_MLX4_PMD) += -libverbs -lmlx4