net/mlx5: fix number of retries for UAR allocation
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Commit Message
Previous patch added definition of number of retries for UAR allocation.
This value is adequate for x86 systems with 4K pages.
On power9 system with 64K pages the required value is 32.
This patch updates the defined value from 2 to 32.
Fixes: a0bfe9d56f74 ("net/mlx5: fix UAR memory mapping type")
Cc: stable@dpdk.org
Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
---
drivers/net/mlx5/mlx5_defs.h | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
Comments
03/08/2020 11:18, Dekel Peled:
> Previous patch added definition of number of retries for UAR allocation.
> This value is adequate for x86 systems with 4K pages.
> On power9 system with 64K pages the required value is 32.
> This patch updates the defined value from 2 to 32.
What about bigger pages?
> Fixes: a0bfe9d56f74 ("net/mlx5: fix UAR memory mapping type")
> Cc: stable@dpdk.org
No need of stable@dpdk.org because it was introduced in this release.
> Signed-off-by: Dekel Peled <dekelp@mellanox.com>
> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
> ---
> drivers/net/mlx5/mlx5_defs.h | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/net/mlx5/mlx5_defs.h b/drivers/net/mlx5/mlx5_defs.h
> index e5f7acc..c26d5a2 100644
> --- a/drivers/net/mlx5/mlx5_defs.h
> +++ b/drivers/net/mlx5/mlx5_defs.h
> @@ -202,9 +202,7 @@
> * UAR base address if UAR was not the first object in the UAR page.
> * It caused the PMD failure and we should try to get another UAR
> * till we get the first one with non-NULL base address returned.
> - * Should follow the rdma_core internal (not exported) definition
> - * MLX5_NUM_NON_FP_BFREGS_PER_UAR.
> */
> -#define MLX5_ALLOC_UAR_RETRY 2
> +#define MLX5_ALLOC_UAR_RETRY 32
It is missing a comment to explain the calculation with 64K page.
05/08/2020 16:14, Thomas Monjalon:
> 03/08/2020 11:18, Dekel Peled:
> > Previous patch added definition of number of retries for UAR allocation.
> > This value is adequate for x86 systems with 4K pages.
> > On power9 system with 64K pages the required value is 32.
> > This patch updates the defined value from 2 to 32.
>
> What about bigger pages?
>
> > Fixes: a0bfe9d56f74 ("net/mlx5: fix UAR memory mapping type")
> > Cc: stable@dpdk.org
>
> No need of stable@dpdk.org because it was introduced in this release.
>
> > Signed-off-by: Dekel Peled <dekelp@mellanox.com>
> > Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
> > ---
> > drivers/net/mlx5/mlx5_defs.h | 4 +---
> > 1 file changed, 1 insertion(+), 3 deletions(-)
> >
> > diff --git a/drivers/net/mlx5/mlx5_defs.h b/drivers/net/mlx5/mlx5_defs.h
> > index e5f7acc..c26d5a2 100644
> > --- a/drivers/net/mlx5/mlx5_defs.h
> > +++ b/drivers/net/mlx5/mlx5_defs.h
> > @@ -202,9 +202,7 @@
> > * UAR base address if UAR was not the first object in the UAR page.
> > * It caused the PMD failure and we should try to get another UAR
> > * till we get the first one with non-NULL base address returned.
> > - * Should follow the rdma_core internal (not exported) definition
> > - * MLX5_NUM_NON_FP_BFREGS_PER_UAR.
> > */
> > -#define MLX5_ALLOC_UAR_RETRY 2
> > +#define MLX5_ALLOC_UAR_RETRY 32
>
> It is missing a comment to explain the calculation with 64K page.
It seems getting reasons for this magic workaround is not trivial.
Applied, thanks
@@ -202,9 +202,7 @@
* UAR base address if UAR was not the first object in the UAR page.
* It caused the PMD failure and we should try to get another UAR
* till we get the first one with non-NULL base address returned.
- * Should follow the rdma_core internal (not exported) definition
- * MLX5_NUM_NON_FP_BFREGS_PER_UAR.
*/
-#define MLX5_ALLOC_UAR_RETRY 2
+#define MLX5_ALLOC_UAR_RETRY 32
#endif /* RTE_PMD_MLX5_DEFS_H_ */