[20.11,12/20] raw/ioat: add datapath data structures for idxd devices
diff mbox series

Message ID 20200721095140.719297-13-bruce.richardson@intel.com
State Superseded
Delegated to: Thomas Monjalon
Headers show
Series
  • raw/ioat: enhancements and new hardware support
Related show

Checks

Context Check Description
ci/Intel-compilation fail apply issues
ci/checkpatch warning coding style issues

Commit Message

Bruce Richardson July 21, 2020, 9:51 a.m. UTC
Add in the relevant data structures for the data path for DSA devices. Also
include a device dump function to output the status of each device.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
---
 drivers/raw/ioat/idxd_pci.c            |  3 +-
 drivers/raw/ioat/idxd_vdev.c           |  1 +
 drivers/raw/ioat/ioat_common.c         | 34 +++++++++++
 drivers/raw/ioat/ioat_private.h        |  2 +
 drivers/raw/ioat/ioat_rawdev_test.c    |  3 +-
 drivers/raw/ioat/rte_ioat_rawdev_fns.h | 80 ++++++++++++++++++++++++++
 6 files changed, 121 insertions(+), 2 deletions(-)

Patch
diff mbox series

diff --git a/drivers/raw/ioat/idxd_pci.c b/drivers/raw/ioat/idxd_pci.c
index 11c07efaa..78c443703 100644
--- a/drivers/raw/ioat/idxd_pci.c
+++ b/drivers/raw/ioat/idxd_pci.c
@@ -52,7 +52,8 @@  idxd_is_wq_enabled(struct idxd_rawdev *idxd)
 }
 
 static const struct rte_rawdev_ops idxd_pci_ops = {
-		.dev_selftest = idxd_rawdev_test
+		.dev_selftest = idxd_rawdev_test,
+		.dump = idxd_dev_dump,
 };
 
 /* each portal uses 4 x 4k pages */
diff --git a/drivers/raw/ioat/idxd_vdev.c b/drivers/raw/ioat/idxd_vdev.c
index e81bd7326..2b8122cbc 100644
--- a/drivers/raw/ioat/idxd_vdev.c
+++ b/drivers/raw/ioat/idxd_vdev.c
@@ -34,6 +34,7 @@  struct idxd_vdev_args {
 
 static const struct rte_rawdev_ops idxd_vdev_ops = {
 		.dev_selftest = idxd_rawdev_test,
+		.dump = idxd_dev_dump,
 };
 
 static void *
diff --git a/drivers/raw/ioat/ioat_common.c b/drivers/raw/ioat/ioat_common.c
index 4397be886..3dda4ab8e 100644
--- a/drivers/raw/ioat/ioat_common.c
+++ b/drivers/raw/ioat/ioat_common.c
@@ -7,6 +7,36 @@ 
 
 #include "ioat_private.h"
 
+int
+idxd_dev_dump(struct rte_rawdev *dev, FILE *f)
+{
+	struct idxd_rawdev *idxd = dev->dev_private;
+	struct rte_idxd_rawdev *rte_idxd = &idxd->public;
+	int i;
+
+	fprintf(f, "Raw Device #%d\n", dev->dev_id);
+	fprintf(f, "Driver: %s\n\n", dev->driver_name);
+
+	fprintf(f, "Portal: %p\n", rte_idxd->portal);
+	fprintf(f, "Batch Ring size: %u\n", rte_idxd->batch_ring_sz);
+	fprintf(f, "Comp Handle Ring size: %u\n\n", rte_idxd->hdl_ring_sz);
+
+	fprintf(f, "Next batch: %u\n", rte_idxd->next_batch);
+	fprintf(f, "Next batch to be completed: %u\n", rte_idxd->next_completed);
+	for (i = 0; i < rte_idxd->batch_ring_sz; i++) {
+		struct rte_idxd_desc_batch *b = &rte_idxd->batch_ring[i];
+		fprintf(f, "Batch %u @%p: submitted=%u, op_count=%u, hdl_end=%u\n",
+				i, b, b->submitted, b->op_count, b->hdl_end);
+	}
+
+	fprintf(f, "\n");
+	fprintf(f, "Next free hdl: %u\n", rte_idxd->next_free_hdl);
+	fprintf(f, "Last completed hdl: %u\n", rte_idxd->last_completed_hdl);
+	fprintf(f, "Next returned hdl: %u\n", rte_idxd->next_ret_hdl);
+
+	return 0;
+}
+
 int
 idxd_rawdev_create(const char *name, struct rte_device *dev,
 		   const struct idxd_rawdev *base_idxd,
@@ -18,6 +48,10 @@  idxd_rawdev_create(const char *name, struct rte_device *dev,
 	char mz_name[RTE_MEMZONE_NAMESIZE];
 	int ret = 0;
 
+	RTE_BUILD_BUG_ON(sizeof(struct rte_idxd_hw_desc) != 64);
+	RTE_BUILD_BUG_ON(offsetof(struct rte_idxd_hw_desc, size ) != 32);
+	RTE_BUILD_BUG_ON(sizeof(struct rte_idxd_completion) != 32);
+
 	if (!name) {
 		IOAT_PMD_ERR("Invalid name of the device!");
 		ret = -EINVAL;
diff --git a/drivers/raw/ioat/ioat_private.h b/drivers/raw/ioat/ioat_private.h
index 2ddaddc37..a873f3f2c 100644
--- a/drivers/raw/ioat/ioat_private.h
+++ b/drivers/raw/ioat/ioat_private.h
@@ -61,4 +61,6 @@  extern int idxd_rawdev_create(const char *name, struct rte_device *dev,
 
 extern int idxd_rawdev_test(uint16_t dev_id);
 
+extern int idxd_dev_dump(struct rte_rawdev *dev, FILE *f);
+
 #endif /* _IOAT_PRIVATE_H_ */
diff --git a/drivers/raw/ioat/ioat_rawdev_test.c b/drivers/raw/ioat/ioat_rawdev_test.c
index b208b8c19..7864138fb 100644
--- a/drivers/raw/ioat/ioat_rawdev_test.c
+++ b/drivers/raw/ioat/ioat_rawdev_test.c
@@ -255,7 +255,8 @@  ioat_rawdev_test(uint16_t dev_id)
 }
 
 int
-idxd_rawdev_test(uint16_t dev_id __rte_unused)
+idxd_rawdev_test(uint16_t dev_id)
 {
+	rte_rawdev_dump(dev_id, stdout);
 	return 0;
 }
diff --git a/drivers/raw/ioat/rte_ioat_rawdev_fns.h b/drivers/raw/ioat/rte_ioat_rawdev_fns.h
index aca91dd4f..abd90514b 100644
--- a/drivers/raw/ioat/rte_ioat_rawdev_fns.h
+++ b/drivers/raw/ioat/rte_ioat_rawdev_fns.h
@@ -88,6 +88,86 @@  struct rte_ioat_rawdev {
 #define RTE_IOAT_CHANSTS_HALTED		0x3
 #define RTE_IOAT_CHANSTS_ARMED			0x4
 
+/*
+ * Defines used in the data path for interacting with hardware.
+ */
+#define IDXD_CMD_OP_SHIFT 24
+enum rte_idxd_ops {
+	idxd_op_nop = 0,
+	idxd_op_batch,
+	idxd_op_drain,
+	idxd_op_memmove,
+	idxd_op_fill
+};
+
+#define IDXD_FLAG_FENCE                 (1 << 0)
+#define IDXD_FLAG_COMPLETION_ADDR_VALID (1 << 2)
+#define IDXD_FLAG_REQUEST_COMPLETION    (1 << 3)
+#define IDXD_FLAG_CACHE_CONTROL         (1 << 8)
+
+/**
+ * Hardware descriptor used by DSA hardware, for both bursts and
+ * for individual operations.
+ */
+struct rte_idxd_hw_desc {
+	uint32_t pasid;
+	uint32_t op_flags;
+	rte_iova_t completion;
+
+	RTE_STD_C11
+	union {
+		rte_iova_t src;      /* source address for copy ops etc. */
+		rte_iova_t desc_addr; /* descriptor pointer for batch */
+	};
+	rte_iova_t dst;
+
+	uint32_t size;    /* length of data for op, or batch size */
+
+	/* 28 bytes of padding here */
+} __rte_aligned(64);
+
+/**
+ * Completion record structure written back by DSA
+ */
+struct rte_idxd_completion {
+	uint8_t status;
+	uint8_t result;
+	/* 16-bits pad here */
+	uint32_t completed_size; /* data length, or descriptors for batch */
+
+	rte_iova_t fault_address;
+	uint32_t invalid_flags;
+} __rte_aligned(32);
+
+#define BATCH_SIZE 64
+
+/**
+ * Structure used inside the driver for building up and submitting
+ * a batch of operations to the DSA hardware.
+ */
+struct rte_idxd_desc_batch {
+	struct rte_idxd_completion comp; /* the completion record for batch */
+
+	uint16_t submitted;
+	uint16_t op_count;
+	uint16_t hdl_end;
+
+	struct rte_idxd_hw_desc batch_desc;
+
+	/* batches must always have 2 descriptors, so put a null at the start */
+	struct rte_idxd_hw_desc null_desc;
+	struct rte_idxd_hw_desc ops[BATCH_SIZE];
+};
+
+/**
+ * structure used to save the "handles" provided by the user to be
+ * returned to the user on job completion.
+ */
+struct rte_idxd_user_hdl {
+	uint64_t src;
+	uint64_t dst;
+};
+
 /**
  * @internal
  * Structure representing an IDXD device instance