vdpa/mlx5: fix the compatibility with MISC4
diff mbox series

Message ID 1595319220-173871-1-git-send-email-bingz@mellanox.com
State Accepted, archived
Delegated to: Maxime Coquelin
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  • vdpa/mlx5: fix the compatibility with MISC4
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Commit Message

Bing Zhao July 21, 2020, 8:13 a.m. UTC
When dynamic flex parser feature is introduced, the support for misc
parameters 4 of flow table entry (FTE) match set is needed. The
structure of "mlx5_ifc_fte_match_param_bits" is extended with
"mlx5_ifc_fte_match_set_misc4_bits" at the end of it. The total size
of the FTE match set will be changed into 384 bytes from 320 bytes.
Low level user space driver (rdma-core) will have the validation of
the length of FTE match set. In the old release that no MISC4
supported in the rdma-core, and this will break the backward
compatibility, even if the MISC4 is not used in most cases, like
in vDPA driver.
In order not to break the compatibility old rdma-core, the length
adjustment needs to be done. In mlx5 vDPA driver, the lengths of
the matcher and value are both set to 320 without MISC4. There is
no need to change the structure definition, all bytes of the MISC4
will be discarded if it is not needed. Since the MISC4 parameter
is aligned with a 64B boundary and so does the whole FTE match set
parameter, there is no need to take any padding and alignment into
consideration when calculating the size.

Fixes: 32132fb8517c ("net/mlx5: add flow translation of eCPRI header")

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
---
 drivers/vdpa/mlx5/mlx5_vdpa_steer.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

Comments

Maxime Coquelin July 28, 2020, 7:15 a.m. UTC | #1
On 7/21/20 10:13 AM, Bing Zhao wrote:
> When dynamic flex parser feature is introduced, the support for misc
> parameters 4 of flow table entry (FTE) match set is needed. The
> structure of "mlx5_ifc_fte_match_param_bits" is extended with
> "mlx5_ifc_fte_match_set_misc4_bits" at the end of it. The total size
> of the FTE match set will be changed into 384 bytes from 320 bytes.
> Low level user space driver (rdma-core) will have the validation of
> the length of FTE match set. In the old release that no MISC4
> supported in the rdma-core, and this will break the backward
> compatibility, even if the MISC4 is not used in most cases, like
> in vDPA driver.
> In order not to break the compatibility old rdma-core, the length
> adjustment needs to be done. In mlx5 vDPA driver, the lengths of
> the matcher and value are both set to 320 without MISC4. There is
> no need to change the structure definition, all bytes of the MISC4
> will be discarded if it is not needed. Since the MISC4 parameter
> is aligned with a 64B boundary and so does the whole FTE match set
> parameter, there is no need to take any padding and alignment into
> consideration when calculating the size.
> 
> Fixes: 32132fb8517c ("net/mlx5: add flow translation of eCPRI header")
> 
> Signed-off-by: Bing Zhao <bingz@mellanox.com>
> Acked-by: Matan Azrad <matan@mellanox.com>
> ---
>  drivers/vdpa/mlx5/mlx5_vdpa_steer.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime
Bing Zhao July 28, 2020, 11:11 a.m. UTC | #2
Thanks a lot.

BR. Bing

> -----Original Message-----
> From: Maxime Coquelin <maxime.coquelin@redhat.com>
> Sent: Tuesday, July 28, 2020 3:15 PM
> To: Bing Zhao <bingz@mellanox.com>; Slava Ovsiienko
> <viacheslavo@mellanox.com>; Matan Azrad <matan@mellanox.com>
> Cc: dev@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH] vdpa/mlx5: fix the compatibility with
> MISC4
> 
> 
> 
> On 7/21/20 10:13 AM, Bing Zhao wrote:
> > When dynamic flex parser feature is introduced, the support for misc
> > parameters 4 of flow table entry (FTE) match set is needed. The
> > structure of "mlx5_ifc_fte_match_param_bits" is extended with
> > "mlx5_ifc_fte_match_set_misc4_bits" at the end of it. The total size
> > of the FTE match set will be changed into 384 bytes from 320 bytes.
> > Low level user space driver (rdma-core) will have the validation of
> > the length of FTE match set. In the old release that no MISC4
> > supported in the rdma-core, and this will break the backward
> > compatibility, even if the MISC4 is not used in most cases, like in
> > vDPA driver.
> > In order not to break the compatibility old rdma-core, the length
> > adjustment needs to be done. In mlx5 vDPA driver, the lengths of
> the
> > matcher and value are both set to 320 without MISC4. There is no
> need
> > to change the structure definition, all bytes of the MISC4 will be
> > discarded if it is not needed. Since the MISC4 parameter is aligned
> > with a 64B boundary and so does the whole FTE match set parameter,
> > there is no need to take any padding and alignment into
> consideration
> > when calculating the size.
> >
> > Fixes: 32132fb8517c ("net/mlx5: add flow translation of eCPRI
> header")
> >
> > Signed-off-by: Bing Zhao <bingz@mellanox.com>
> > Acked-by: Matan Azrad <matan@mellanox.com>
> > ---
> >  drivers/vdpa/mlx5/mlx5_vdpa_steer.c | 6 ++++--
> >  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
> 
> Thanks,
> Maxime
Maxime Coquelin July 28, 2020, 3:25 p.m. UTC | #3
On 7/21/20 10:13 AM, Bing Zhao wrote:
> When dynamic flex parser feature is introduced, the support for misc
> parameters 4 of flow table entry (FTE) match set is needed. The
> structure of "mlx5_ifc_fte_match_param_bits" is extended with
> "mlx5_ifc_fte_match_set_misc4_bits" at the end of it. The total size
> of the FTE match set will be changed into 384 bytes from 320 bytes.
> Low level user space driver (rdma-core) will have the validation of
> the length of FTE match set. In the old release that no MISC4
> supported in the rdma-core, and this will break the backward
> compatibility, even if the MISC4 is not used in most cases, like
> in vDPA driver.
> In order not to break the compatibility old rdma-core, the length
> adjustment needs to be done. In mlx5 vDPA driver, the lengths of
> the matcher and value are both set to 320 without MISC4. There is
> no need to change the structure definition, all bytes of the MISC4
> will be discarded if it is not needed. Since the MISC4 parameter
> is aligned with a 64B boundary and so does the whole FTE match set
> parameter, there is no need to take any padding and alignment into
> consideration when calculating the size.
> 
> Fixes: 32132fb8517c ("net/mlx5: add flow translation of eCPRI header")
> 
> Signed-off-by: Bing Zhao <bingz@mellanox.com>
> Acked-by: Matan Azrad <matan@mellanox.com>
> ---
>  drivers/vdpa/mlx5/mlx5_vdpa_steer.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)

Please note the sha-1 in the fixes tag was not good, I fixed it.

Applied to dpdk-next-virtio/master

Thanks,
Maxime

Patch
diff mbox series

diff --git a/drivers/vdpa/mlx5/mlx5_vdpa_steer.c b/drivers/vdpa/mlx5/mlx5_vdpa_steer.c
index 406c7be..1fcd24c 100644
--- a/drivers/vdpa/mlx5/mlx5_vdpa_steer.c
+++ b/drivers/vdpa/mlx5/mlx5_vdpa_steer.c
@@ -139,10 +139,12 @@ 
 		uint32_t buf[MLX5_ST_SZ_DW(fte_match_param)];
 		/**< Matcher value. This value is used as the mask or a key. */
 	} matcher_mask = {
-				.size = sizeof(matcher_mask.buf),
+				.size = sizeof(matcher_mask.buf) -
+					MLX5_ST_SZ_BYTES(fte_match_set_misc4),
 			},
 	  matcher_value = {
-				.size = sizeof(matcher_value.buf),
+				.size = sizeof(matcher_value.buf) -
+					MLX5_ST_SZ_BYTES(fte_match_set_misc4),
 			};
 	struct mlx5dv_flow_matcher_attr dv_attr = {
 		.type = IBV_FLOW_ATTR_NORMAL,