From patchwork Mon Jul 13 22:23:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chenmin Sun X-Patchwork-Id: 73944 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 133F9A0540; Mon, 13 Jul 2020 15:28:08 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C6F2F1D69B; Mon, 13 Jul 2020 15:28:07 +0200 (CEST) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id 02C421D603 for ; Mon, 13 Jul 2020 15:28:06 +0200 (CEST) IronPort-SDR: HJ4oz8WlEl1v9FP4VK7EaOF+D4CSfBeUhHaugCfrNxTjneUlBNoPIbGsrJQtG1fBRVuXqpPTp8 TIQQHM25lXgw== X-IronPort-AV: E=McAfee;i="6000,8403,9680"; a="210145230" X-IronPort-AV: E=Sophos;i="5.75,347,1589266800"; d="scan'208";a="210145230" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jul 2020 06:28:05 -0700 IronPort-SDR: 8+WQ2VIAvZWq3/SIUOOrA6gUS38ytZSF+wjE5YrZ+HOCy2s7+raTnTIqOiyJy8FcxsasiW4yJ9 4TKg5Gkxob5A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,347,1589266800"; d="scan'208";a="459293468" Received: from npg-dpdk-vpp-scm-1.sh.intel.com ([10.67.118.226]) by orsmga005.jf.intel.com with ESMTP; 13 Jul 2020 06:28:03 -0700 From: chenmin.sun@intel.com To: qi.z.zhang@intel.com, beilei.xing@intel.com, jingjing.wu@intel.com, haiyue.wang@intel.com Cc: dev@dpdk.org, chenmin.sun@intel.com Date: Tue, 14 Jul 2020 06:23:20 +0800 Message-Id: <20200713222321.2118-2-chenmin.sun@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200713222321.2118-1-chenmin.sun@intel.com> References: <20200709143932.35806-1-chenmin.sun@intel.com> <20200713222321.2118-1-chenmin.sun@intel.com> Subject: [dpdk-dev] [PATCH V3 1/2] net/i40e: i40e FDIR update rate optimization data structures X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Chenmin Sun This patch introduces the new data structures for i40e fdir update rate optimization. Signed-off-by: Chenmin Sun --- drivers/net/i40e/i40e_ethdev.h | 72 ++++++++++++++++++++++++++++------ 1 file changed, 61 insertions(+), 11 deletions(-) diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h index 31ca05de9..8baa67233 100644 --- a/drivers/net/i40e/i40e_ethdev.h +++ b/drivers/net/i40e/i40e_ethdev.h @@ -264,6 +264,15 @@ enum i40e_flxpld_layer_idx { #define I40E_DEFAULT_DCB_APP_NUM 1 #define I40E_DEFAULT_DCB_APP_PRIO 3 +/* + * Struct to store flow created. + */ +struct rte_flow { + TAILQ_ENTRY(rte_flow) node; + enum rte_filter_type filter_type; + void *rule; +}; + /** * The overhead from MTU to max frame size. * Considering QinQ packet, the VLAN tag needs to be counted twice. @@ -674,17 +683,37 @@ struct i40e_fdir_filter { struct i40e_fdir_filter_conf fdir; }; +/* fdir memory pool entry */ +struct i40e_fdir_entry { + struct rte_flow flow; + uint32_t idx; +}; + +/* pre-allocated fdir memory pool */ +struct i40e_fdir_flow_pool { + /* a bitmap to manage the fdir pool */ + struct rte_bitmap *b; + /* the size the pool is pf->fdir->fdir_space_size */ + struct i40e_fdir_entry *pool; +}; + +#define FLOW_TO_FLOW_BITMAP(f) \ + container_of((f), struct i40e_fdir_entry, flow) + TAILQ_HEAD(i40e_fdir_filter_list, i40e_fdir_filter); /* * A structure used to define fields of a FDIR related info. */ struct i40e_fdir_info { +#define PRG_PKT_CNT 128 + struct i40e_vsi *fdir_vsi; /* pointer to fdir VSI structure */ uint16_t match_counter_index; /* Statistic counter index used for fdir*/ struct i40e_tx_queue *txq; struct i40e_rx_queue *rxq; void *prg_pkt; /* memory for fdir program packet */ uint64_t dma_addr; /* physic address of packet memory*/ + /* input set bits for each pctype */ uint64_t input_set[I40E_FILTER_PCTYPE_MAX]; /* @@ -697,6 +726,36 @@ struct i40e_fdir_info { struct i40e_fdir_filter_list fdir_list; struct i40e_fdir_filter **hash_map; struct rte_hash *hash_table; + /* An array to store the inserted rules input */ + struct i40e_fdir_filter *fdir_filter_array; + + /* + * Priority ordering at filter invalidation(destroying a flow) between + * "best effort" space and "guaranteed" space. + * + * 0 = At filter invalidation, the hardware first tries to increment the + * "best effort" space. The "guaranteed" space is incremented only when + * the global "best effort" space is at it max value or the "best effort" + * space of the PF is at its max value. + * 1 = At filter invalidation, the hardware first tries to increment its + * "guaranteed" space. The "best effort" space is incremented only when + * it is already at its max value. + */ + uint32_t fdir_invalprio; + /* the total size of the fdir, this number is the sum of the guaranteed + + * shared space + */ + uint32_t fdir_space_size; + /* the actual number of the fdir rules in hardware, initialized as 0 */ + uint32_t fdir_actual_cnt; + /* the guaranteed space of the fdir */ + uint32_t fdir_guarantee_free_space; + /* the available guaranteed space, initialized as the + * fdir_guarantee_free_space and dynamically maintained + */ + uint32_t fdir_guarantee_available_space; + /* the pre-allocated pool of the rte_flow */ + struct i40e_fdir_flow_pool fdir_flow_pool; /* Mark if flex pit and mask is set */ bool flex_pit_flag[I40E_MAX_FLXPLD_LAYER]; @@ -894,15 +953,6 @@ struct i40e_mirror_rule { TAILQ_HEAD(i40e_mirror_rule_list, i40e_mirror_rule); -/* - * Struct to store flow created. - */ -struct rte_flow { - TAILQ_ENTRY(rte_flow) node; - enum rte_filter_type filter_type; - void *rule; -}; - TAILQ_HEAD(i40e_flow_list, rte_flow); /* Struct to store Traffic Manager shaper profile. */ @@ -1335,8 +1385,8 @@ int i40e_add_del_fdir_filter(struct rte_eth_dev *dev, const struct rte_eth_fdir_filter *filter, bool add); int i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev, - const struct i40e_fdir_filter_conf *filter, - bool add); + const struct i40e_fdir_filter_conf *filter, + bool add); int i40e_dev_tunnel_filter_set(struct i40e_pf *pf, struct rte_eth_tunnel_filter_conf *tunnel_filter, uint8_t add);