From patchwork Mon Jul 13 05:17:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Somnath Kotur X-Patchwork-Id: 73860 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 32BB0A0540; Mon, 13 Jul 2020 07:23:14 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E7FDD1C0B0; Mon, 13 Jul 2020 07:23:12 +0200 (CEST) Received: from relay.smtp.broadcom.com (unknown [192.19.232.149]) by dpdk.org (Postfix) with ESMTP id 6910B1BFAD for ; Mon, 13 Jul 2020 07:23:11 +0200 (CEST) Received: from dhcp-10-123-153-55.dhcp.broadcom.net (dhcp-10-123-153-55.dhcp.broadcom.net [10.123.153.55]) by relay.smtp.broadcom.com (Postfix) with ESMTP id 1B80A1BE464; Sun, 12 Jul 2020 22:23:09 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.10.3 relay.smtp.broadcom.com 1B80A1BE464 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1594617791; bh=Xpuy59nk2KECBKkPyVmZ96wTED0f5P1HK+ydqe3pWxM=; h=From:To:Cc:Subject:Date:From; b=LLkRXggfDLhHvv13Y72hoCN1/PkPJ4IDOOmd+EltDl1wl1ywHH4CnI9u5H08I755j YNhpe/s3MGFptTfXgvS6RGeoN49Qlssc8ZoJ8VDkrPHb54i1E0Njpx3dngQugCqqKV ys0D5dC46fkq2+qDDBHrYEf8ZM1JAd98rguQsaJI= From: Somnath Kotur To: dev@dpdk.org Cc: ferruh.yigit@intel.com Date: Mon, 13 Jul 2020 10:47:59 +0530 Message-Id: <20200713051759.18901-1-somnath.kotur@broadcom.com> X-Mailer: git-send-email 2.10.1.613.g2cc2e70 Subject: [dpdk-dev] [PATCH] net/bnxt: fix a segfault during Tx X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ajit Khaparde When TRUFLOW is not enabled ulp_ctx is not allocated. In non-vector Tx datapath we are accessing this invalid pointer resulting in a segfault. Check if TRUFLOW is enabled before accessing ulp_ctx to avoid this. Fixes: f86dc320a894 ("net/bnxt: fill cfa action in Tx descriptor") Signed-off-by: Ajit Khaparde Reviewed-by: Venkat Duvvuru Signed-off-by: Somnath Kotur Signed-off-by: Venkat Duvvuru --- drivers/net/bnxt/bnxt_txr.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/net/bnxt/bnxt_txr.c b/drivers/net/bnxt/bnxt_txr.c index f588426..c741c71 100644 --- a/drivers/net/bnxt/bnxt_txr.c +++ b/drivers/net/bnxt/bnxt_txr.c @@ -132,8 +132,9 @@ static uint16_t bnxt_start_xmit(struct rte_mbuf *tx_pkt, PKT_TX_TUNNEL_GRE | PKT_TX_TUNNEL_VXLAN | PKT_TX_TUNNEL_GENEVE | PKT_TX_IEEE1588_TMST | PKT_TX_QINQ_PKT) || - txq->bp->ulp_ctx->cfg_data->tx_cfa_action || - txq->vfr_tx_cfa_action) + (BNXT_TRUFLOW_EN(txq->bp) && + (txq->bp->ulp_ctx->cfg_data->tx_cfa_action || + txq->vfr_tx_cfa_action))) long_bd = true; nr_bds = long_bd + tx_pkt->nb_segs;