[v4,10/10] maintainers: add maintainers for mlx5 pci bus

Message ID 20200703134641.386297-11-parav@mellanox.com (mailing list archive)
State Superseded, archived
Delegated to: Raslan Darawsheh
Headers
Series Improve mlx5 PMD driver framework for multiple classes |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/travis-robot success Travis build: passed
ci/Intel-compilation success Compilation OK

Commit Message

Parav Pandit July 3, 2020, 1:46 p.m. UTC
  Added maintainers for new mlx5 specific mlx5_pci bus.

Signed-off-by: Parav Pandit <parav@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
---
 MAINTAINERS | 5 +++++
 1 file changed, 5 insertions(+)
  

Patch

diff --git a/MAINTAINERS b/MAINTAINERS
index 53a5e9a9e..e3fec55ca 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -517,6 +517,11 @@  Intel FPGA bus
 M: Rosen Xu <rosen.xu@intel.com>
 F: drivers/bus/ifpga/
 
+Melllanox mlx5 PCI bus driver
+M: Parav Pandit <parav@mellaox.com>
+M: Matan Azrad <matan@mellanox.com>
+F: drivers/bus/mlx5_pci
+
 NXP buses
 M: Hemant Agrawal <hemant.agrawal@nxp.com>
 M: Sachin Saxena <sachin.saxena@nxp.com>