[3/5] net/cxgbe: fix double MPS alloc due to flow validate and create

Message ID 98c3a261b8e69bbf58fcc65d7d741be04421615c.1591998771.git.rahul.lakkireddy@chelsio.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers
Series net/cxgbe: fix rte_flow related hardware resource leaks |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Rahul Lakkireddy June 12, 2020, 10:07 p.m. UTC
  The Multi Port Switch (MPS) entry is allocated twice when both
flow validate and create are invoked, but only freed once during
flow destroy. Avoid double alloc by moving MPS entry allocation
closer to when the filter create request is sent to hardware and
will be ignored for filter validate request.

Fixes: fefee7a619a4 ("net/cxgbe: add flow ops to match based on dest MAC")
Cc: stable@dpdk.org

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
---
 drivers/net/cxgbe/cxgbe_filter.c | 32 ++++++++++++++++++++++++++++++++
 drivers/net/cxgbe/cxgbe_filter.h |  4 +++-
 drivers/net/cxgbe/cxgbe_flow.c   | 28 +++-------------------------
 3 files changed, 38 insertions(+), 26 deletions(-)
  

Patch

diff --git a/drivers/net/cxgbe/cxgbe_filter.c b/drivers/net/cxgbe/cxgbe_filter.c
index 06233e41e..317830f58 100644
--- a/drivers/net/cxgbe/cxgbe_filter.c
+++ b/drivers/net/cxgbe/cxgbe_filter.c
@@ -8,6 +8,7 @@ 
 #include "base/t4_tcb.h"
 #include "base/t4_regs.h"
 #include "cxgbe_filter.h"
+#include "mps_tcam.h"
 #include "clip_tbl.h"
 #include "l2t.h"
 #include "smt.h"
@@ -290,12 +291,17 @@  int cxgbe_alloc_ftid(struct adapter *adap, u8 nentries)
  */
 static void clear_filter(struct filter_entry *f)
 {
+	struct port_info *pi = ethdev2pinfo(f->dev);
+
 	if (f->clipt)
 		cxgbe_clip_release(f->dev, f->clipt);
 
 	if (f->l2t)
 		cxgbe_l2t_release(f->l2t);
 
+	if (f->fs.mask.macidx)
+		cxgbe_mpstcam_remove(pi, f->fs.val.macidx);
+
 	/* The zeroing of the filter rule below clears the filter valid,
 	 * pending, locked flags etc. so it's all we need for
 	 * this operation.
@@ -609,6 +615,19 @@  static int cxgbe_set_hash_filter(struct rte_eth_dev *dev,
 	f->dev = dev;
 	f->fs.iq = iq;
 
+	/* Allocate MPS TCAM entry to match Destination MAC. */
+	if (f->fs.mask.macidx) {
+		int idx;
+
+		idx = cxgbe_mpstcam_alloc(pi, f->fs.val.dmac, f->fs.mask.dmac);
+		if (idx <= 0) {
+			ret = -ENOMEM;
+			goto out_err;
+		}
+
+		f->fs.val.macidx = idx;
+	}
+
 	/*
 	 * If the new filter requires loopback Destination MAC and/or VLAN
 	 * rewriting then we need to allocate a Layer 2 Table (L2T) entry for
@@ -1067,6 +1086,19 @@  int cxgbe_set_filter(struct rte_eth_dev *dev, unsigned int filter_id,
 	f->fs.iq = iq;
 	f->dev = dev;
 
+	/* Allocate MPS TCAM entry to match Destination MAC. */
+	if (f->fs.mask.macidx) {
+		int idx;
+
+		idx = cxgbe_mpstcam_alloc(pi, f->fs.val.dmac, f->fs.mask.dmac);
+		if (idx <= 0) {
+			ret = -ENOMEM;
+			goto free_tid;
+		}
+
+		f->fs.val.macidx = idx;
+	}
+
 	/* Allocate a clip table entry only if we have non-zero IPv6 address. */
 	if (chip_ver > CHELSIO_T5 && f->fs.type &&
 	    memcmp(f->fs.val.lip, bitoff, sizeof(bitoff))) {
diff --git a/drivers/net/cxgbe/cxgbe_filter.h b/drivers/net/cxgbe/cxgbe_filter.h
index e79c052de..46ebf8333 100644
--- a/drivers/net/cxgbe/cxgbe_filter.h
+++ b/drivers/net/cxgbe/cxgbe_filter.h
@@ -69,8 +69,10 @@  struct ch_filter_tuple {
 	uint16_t lport;		/* local port */
 	uint16_t fport;		/* foreign port */
 
+	uint8_t dmac[6];        /* Destination MAC to match */
+
 	/* reservations for future additions */
-	uint8_t rsvd[12];
+	uint8_t rsvd[6];
 };
 
 /*
diff --git a/drivers/net/cxgbe/cxgbe_flow.c b/drivers/net/cxgbe/cxgbe_flow.c
index 166c39ba5..dd8ee7bbd 100644
--- a/drivers/net/cxgbe/cxgbe_flow.c
+++ b/drivers/net/cxgbe/cxgbe_flow.c
@@ -194,20 +194,9 @@  ch_rte_parsetype_eth(const void *dmask, const struct rte_flow_item *item,
 					  "src mac filtering not supported");
 
 	if (!rte_is_zero_ether_addr(&mask->dst)) {
-		const u8 *addr = (const u8 *)&spec->dst.addr_bytes[0];
-		const u8 *m = (const u8 *)&mask->dst.addr_bytes[0];
-		struct rte_flow *flow = (struct rte_flow *)fs->private;
-		struct port_info *pi = (struct port_info *)
-					(flow->dev->data->dev_private);
-		int idx;
-
-		idx = cxgbe_mpstcam_alloc(pi, addr, m);
-		if (idx <= 0)
-			return rte_flow_error_set(e, idx,
-						  RTE_FLOW_ERROR_TYPE_ITEM,
-						  NULL, "unable to allocate mac"
-						  " entry in h/w");
-		CXGBE_FILL_FS(idx, 0x1ff, macidx);
+		CXGBE_FILL_FS(0, 0x1ff, macidx);
+		CXGBE_FILL_FS_MEMCPY(spec->dst.addr_bytes, mask->dst.addr_bytes,
+				     dmac);
 	}
 
 	CXGBE_FILL_FS(be16_to_cpu(spec->type),
@@ -1212,17 +1201,6 @@  static int __cxgbe_flow_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
 		return ctx.result;
 	}
 
-	fs = &flow->fs;
-	if (fs->mask.macidx) {
-		struct port_info *pi = (struct port_info *)
-					(dev->data->dev_private);
-		int ret;
-
-		ret = cxgbe_mpstcam_remove(pi, fs->val.macidx);
-		if (!ret)
-			return ret;
-	}
-
 	return 0;
 }