diff mbox series

[06/10] net/enetc: cache align enetc bdr structure

Message ID 20200302143209.11854-7-hemant.agrawal@nxp.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers
Series net/enetc: optimization and cleanup |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Hemant Agrawal March 2, 2020, 2:32 p.m. UTC 
  From: Alex Marginean <alexandru.marginean@nxp.com>

Reorder the members of the structure so that the ones used on datapath fit
in a single cache line, to slightly reduce pressure on cache and miss rate.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
---
 drivers/net/enetc/enetc.h | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/enetc/enetc.h b/drivers/net/enetc/enetc.h
index 8c830a5c0..14ef3bc18 100644
--- a/drivers/net/enetc/enetc.h
+++ b/drivers/net/enetc/enetc.h
@@ -53,23 +53,23 @@  struct enetc_swbd {
 };
 
 struct enetc_bdr {
-	struct rte_eth_dev *ndev;
-	struct rte_mempool *mb_pool;   /* mbuf pool to populate RX ring. */
 	void *bd_base;			/* points to Rx or Tx BD ring */
+	struct enetc_swbd *q_swbd;
 	union {
 		void *tcir;
 		void *rcir;
 	};
-	uint16_t index;
 	int bd_count; /* # of BDs */
 	int next_to_use;
 	int next_to_clean;
-	struct enetc_swbd *q_swbd;
+	uint16_t index;
+	uint8_t	crc_len; /* 0 if CRC stripped, 4 otherwise */
 	union {
 		void *tcisr; /* Tx */
 		int next_to_alloc; /* Rx */
 	};
-	uint8_t	crc_len; /* 0 if CRC stripped, 4 otherwise */
+	struct rte_mempool *mb_pool;   /* mbuf pool to populate RX ring. */
+	struct rte_eth_dev *ndev;
 };
 
 /*