From patchwork Wed Jan 22 03:46:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kiran Kumar Kokkilagadda X-Patchwork-Id: 65021 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id A14AEA0525; Wed, 22 Jan 2020 04:46:45 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D93E92A62; Wed, 22 Jan 2020 04:46:44 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 694DFE07 for ; Wed, 22 Jan 2020 04:46:43 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 00M3kWN1027764 for ; Tue, 21 Jan 2020 19:46:42 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=pfpt0818; bh=NHGTBbEzf96B+4fJOBm+j4HGnabccvcoPJsQqabvEtU=; b=bd+4gIuwPEr0iMQ0SMEYql7xKZmlQwQUpgAu16CTHShUShTeHj4Jit5uXlnfTjFOQRsS EQ/LIiJVmRqBkKILnh6vhsuAaausvMOtqMy6pvbG+/Tr14taEFouFLapf5wBDT42EA4e Mij+vBdBbttGp74Fzk/5G332+b3DzYnkRVkEK/5C+VXaT+7WJUgMRDHOpzX9eIr7aa8/ 05VTyUqZ2P3fP8DqkJOux1MGvwwj8dA5ap4eY0zCiNFYWBUSSw6PbDipSUWTbS7qMCCy lxk4GplF/j8F/5Ho795kcDESgwoRa6o2d7sHRvanI5scqi2G0WXisbGvKaNO5OFFLk0S PA== Received: from sc-exch03.marvell.com ([199.233.58.183]) by mx0b-0016f401.pphosted.com with ESMTP id 2xm2dt57p0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 21 Jan 2020 19:46:42 -0800 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 21 Jan 2020 19:46:40 -0800 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 21 Jan 2020 19:46:40 -0800 Received: from localhost.localdomain (unknown [10.28.34.15]) by maili.marvell.com (Postfix) with ESMTP id EA8763F703F; Tue, 21 Jan 2020 19:46:38 -0800 (PST) From: To: Jerin Jacob , Nithin Dabilpuram , Vamsi Attunuru , "Kiran Kumar K" CC: Date: Wed, 22 Jan 2020 09:16:09 +0530 Message-ID: <20200122034609.19100-1-kirankumark@marvell.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572 definitions=2020-01-17_05:2020-01-16, 2020-01-17 signatures=0 Subject: [dpdk-dev] [PATCH] net/octeontx2: extend RSS supported offload types X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kiran Kumar K Extend RSS offload types for octeontx2. Add support to select L3 SRC, L3 DST, L4 SRC and L4 DST for RSS calculation. Add support to select L3 SRC or DST only, L4 SRC or DST only for RSS calculation. With this requirement there will be following combinations, IPV[4,6]_SRC_ONLY, IPV[4,6]_DST_ONLY, [TCP,UDP,SCTP]_SRC_ONLY, [TCP,UDP,SCTP]_DST_ONLY. So, instead of creating a bit for each combination, we are using upper 4 bits (31:28) in the flow_key_cfg to represent the SRC, DST selection. 31 => L3_SRC, 30 => L3_DST, 29 => L4_SRC, 28 => L4_DST. These won't be part of flow_cfg, so that we don't need to change the existing ABI. Signed-off-by: Kiran Kumar K --- drivers/common/octeontx2/otx2_mbox.h | 6 +++++- drivers/net/octeontx2/otx2_rss.c | 12 ++++++++++++ 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/common/octeontx2/otx2_mbox.h b/drivers/common/octeontx2/otx2_mbox.h index e0e4e2f63..4972b8a6e 100644 --- a/drivers/common/octeontx2/otx2_mbox.h +++ b/drivers/common/octeontx2/otx2_mbox.h @@ -918,7 +918,11 @@ struct nix_rss_flowkey_cfg { #define FLOW_KEY_TYPE_INNR_UDP BIT(15) #define FLOW_KEY_TYPE_INNR_SCTP BIT(16) #define FLOW_KEY_TYPE_INNR_ETH_DMAC BIT(17) - uint8_t group; /* RSS context or group */ +#define FLOW_KEY_TYPE_L4_DST BIT(28) +#define FLOW_KEY_TYPE_L4_SRC BIT(29) +#define FLOW_KEY_TYPE_L3_DST BIT(30) +#define FLOW_KEY_TYPE_L3_SRC BIT(31) + uint8_t __otx2_io group; /* RSS context or group */ }; struct nix_rss_flowkey_cfg_rsp { diff --git a/drivers/net/octeontx2/otx2_rss.c b/drivers/net/octeontx2/otx2_rss.c index bc7b64387..7a8c8f3de 100644 --- a/drivers/net/octeontx2/otx2_rss.c +++ b/drivers/net/octeontx2/otx2_rss.c @@ -210,6 +210,18 @@ otx2_rss_ethdev_to_nix(struct otx2_eth_dev *dev, uint64_t ethdev_rss, dev->rss_info.nix_rss = ethdev_rss; + if (ethdev_rss & ETH_RSS_L3_SRC_ONLY) + flowkey_cfg |= FLOW_KEY_TYPE_L3_SRC; + + if (ethdev_rss & ETH_RSS_L3_DST_ONLY) + flowkey_cfg |= FLOW_KEY_TYPE_L3_DST; + + if (ethdev_rss & ETH_RSS_L4_SRC_ONLY) + flowkey_cfg |= FLOW_KEY_TYPE_L4_SRC; + + if (ethdev_rss & ETH_RSS_L4_DST_ONLY) + flowkey_cfg |= FLOW_KEY_TYPE_L4_DST; + if (ethdev_rss & RSS_IPV4_ENABLE) flowkey_cfg |= flow_key_type[rss_level][RSS_IPV4_INDEX];