net/mlx5: fix layer bits not unique

Message ID f37006e05e628fa21f3db3f85eb684039ba00325.1573636905.git.jackmin@mellanox.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series net/mlx5: fix layer bits not unique |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-compilation success Compile Testing PASS
ci/Intel-compilation success Compilation OK
ci/travis-robot success Travis build: passed
ci/iol-mellanox-Performance success Performance Testing PASS

Commit Message

Xiaoyu Min Nov. 13, 2019, 9:29 a.m. UTC
  The layer bits should be unique otherwise layer info will be
interpreted wrongly.

Fixes: 70d84dc797b7 ("net/mlx5: add internal tag item and action")
Cc: orika@mellanox.com

Fixes: 55deee1715f0 ("net/mlx5: extend flow mark support")
Cc: viacheslavo@mellanox.com

Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
---
 drivers/net/mlx5/mlx5_flow.h | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)
  

Comments

Slava Ovsiienko Nov. 13, 2019, 10:05 a.m. UTC | #1
> -----Original Message-----
> From: Xiaoyu Min <jackmin@mellanox.com>
> Sent: Wednesday, November 13, 2019 11:30
> To: Matan Azrad <matan@mellanox.com>; Shahaf Shuler
> <shahafs@mellanox.com>; Slava Ovsiienko <viacheslavo@mellanox.com>
> Cc: dev@dpdk.org; Ori Kam <orika@mellanox.com>
> Subject: [PATCH] net/mlx5: fix layer bits not unique
> 
> The layer bits should be unique otherwise layer info will be interpreted
> wrongly.
> 
> Fixes: 70d84dc797b7 ("net/mlx5: add internal tag item and action")
> Cc: orika@mellanox.com
> 
> Fixes: 55deee1715f0 ("net/mlx5: extend flow mark support")
> Cc: viacheslavo@mellanox.com
> 
> Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
  
Raslan Darawsheh Nov. 13, 2019, 12:39 p.m. UTC | #2
Hi,

> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Xiaoyu Min
> Sent: Wednesday, November 13, 2019 11:30 AM
> To: Matan Azrad <matan@mellanox.com>; Shahaf Shuler
> <shahafs@mellanox.com>; Slava Ovsiienko <viacheslavo@mellanox.com>
> Cc: dev@dpdk.org; Ori Kam <orika@mellanox.com>
> Subject: [dpdk-dev] [PATCH] net/mlx5: fix layer bits not unique
> 
> The layer bits should be unique otherwise layer info will be
> interpreted wrongly.
> 
> Fixes: 70d84dc797b7 ("net/mlx5: add internal tag item and action")
> Cc: orika@mellanox.com
> 
> Fixes: 55deee1715f0 ("net/mlx5: extend flow mark support")
> Cc: viacheslavo@mellanox.com
> 
> Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
> ---
>  drivers/net/mlx5/mlx5_flow.h | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
> index 998da61490..3fff5dd7da 100644
> --- a/drivers/net/mlx5/mlx5_flow.h
> +++ b/drivers/net/mlx5/mlx5_flow.h
> @@ -109,18 +109,18 @@ enum mlx5_feature_name {
>  #define MLX5_FLOW_ITEM_MARK (1u << 19)
> 
>  /* Pattern MISC bits. */
> -#define MLX5_FLOW_LAYER_ICMP (1u << 19)
> -#define MLX5_FLOW_LAYER_ICMP6 (1u << 20)
> -#define MLX5_FLOW_LAYER_GRE_KEY (1u << 21)
> +#define MLX5_FLOW_LAYER_ICMP (1u << 20)
> +#define MLX5_FLOW_LAYER_ICMP6 (1u << 21)
> +#define MLX5_FLOW_LAYER_GRE_KEY (1u << 22)
> 
>  /* Pattern tunnel Layer bits (continued). */
> -#define MLX5_FLOW_LAYER_IPIP (1u << 21)
> -#define MLX5_FLOW_LAYER_IPV6_ENCAP (1u << 22)
> -#define MLX5_FLOW_LAYER_NVGRE (1u << 23)
> -#define MLX5_FLOW_LAYER_GENEVE (1u << 24)
> +#define MLX5_FLOW_LAYER_IPIP (1u << 23)
> +#define MLX5_FLOW_LAYER_IPV6_ENCAP (1u << 24)
> +#define MLX5_FLOW_LAYER_NVGRE (1u << 25)
> +#define MLX5_FLOW_LAYER_GENEVE (1u << 26)
> 
>  /* Queue items. */
> -#define MLX5_FLOW_ITEM_TX_QUEUE (1u << 25)
> +#define MLX5_FLOW_ITEM_TX_QUEUE (1u << 27)
> 
>  /* Outer Masks. */
>  #define MLX5_FLOW_LAYER_OUTER_L3 \
> --
> 2.24.0.rc0.3.g12a4aeaad8

Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh
  

Patch

diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 998da61490..3fff5dd7da 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -109,18 +109,18 @@  enum mlx5_feature_name {
 #define MLX5_FLOW_ITEM_MARK (1u << 19)
 
 /* Pattern MISC bits. */
-#define MLX5_FLOW_LAYER_ICMP (1u << 19)
-#define MLX5_FLOW_LAYER_ICMP6 (1u << 20)
-#define MLX5_FLOW_LAYER_GRE_KEY (1u << 21)
+#define MLX5_FLOW_LAYER_ICMP (1u << 20)
+#define MLX5_FLOW_LAYER_ICMP6 (1u << 21)
+#define MLX5_FLOW_LAYER_GRE_KEY (1u << 22)
 
 /* Pattern tunnel Layer bits (continued). */
-#define MLX5_FLOW_LAYER_IPIP (1u << 21)
-#define MLX5_FLOW_LAYER_IPV6_ENCAP (1u << 22)
-#define MLX5_FLOW_LAYER_NVGRE (1u << 23)
-#define MLX5_FLOW_LAYER_GENEVE (1u << 24)
+#define MLX5_FLOW_LAYER_IPIP (1u << 23)
+#define MLX5_FLOW_LAYER_IPV6_ENCAP (1u << 24)
+#define MLX5_FLOW_LAYER_NVGRE (1u << 25)
+#define MLX5_FLOW_LAYER_GENEVE (1u << 26)
 
 /* Queue items. */
-#define MLX5_FLOW_ITEM_TX_QUEUE (1u << 25)
+#define MLX5_FLOW_ITEM_TX_QUEUE (1u << 27)
 
 /* Outer Masks. */
 #define MLX5_FLOW_LAYER_OUTER_L3 \