From patchwork Wed Oct 23 15:25:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kiran Kumar Kokkilagadda X-Patchwork-Id: 61777 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id AC32F1C433; Wed, 23 Oct 2019 17:26:01 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id C366C1C230 for ; Wed, 23 Oct 2019 17:25:59 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x9NFBUph024708; Wed, 23 Oct 2019 08:25:59 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0818; bh=3cc2s24wzcsR4b0haLpBBUqDjqmXN64+DxsrDrt75u4=; b=REqrNUX56r6t5wD+p9Zd9iEFCc2WkrQZCqeftwBTjJ9441JT31YlMv1f6YQT3QI1YaP1 Ld4dj3Ui/jVMa8uyxmM41c4gnqz2JjKbdZCCG2IKrxdJZaf8q2vSZ5dpJv4Azlbc4j64 NVCig/v7fz38SnbIef7WbNLsitAVAuFcSAsSZo+37BsuN5fhyfAMDbcHhV5GNz0x34bm l/v1G6soiIeyq02kvrO7fuKxQqcgE6zZr0nv2I94ZzK//16x1swO596/9O0yr8kmcbTW W97rmCEA1++IIArdWjUZLBffKjRswEV1C+JQYNkn1AVX6gISDEPTWraHIEdwCWrNkLb3 pg== Received: from sc-exch04.marvell.com ([199.233.58.184]) by mx0a-0016f401.pphosted.com with ESMTP id 2vt9u5kd4p-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 23 Oct 2019 08:25:58 -0700 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Wed, 23 Oct 2019 08:25:57 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Wed, 23 Oct 2019 08:25:57 -0700 Received: from localhost.localdomain (unknown [10.28.34.15]) by maili.marvell.com (Postfix) with ESMTP id 957053F7041; Wed, 23 Oct 2019 08:25:55 -0700 (PDT) From: To: Jerin Jacob , Nithin Dabilpuram , Kiran Kumar K , "John McNamara" , Marko Kovacevic , Vamsi Attunuru CC: Date: Wed, 23 Oct 2019 20:55:49 +0530 Message-ID: <20191023152549.18658-2-kirankumark@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191023152549.18658-1-kirankumark@marvell.com> References: <20191023152043.17887-1-kirankumark@marvell.com> <20191023152549.18658-1-kirankumark@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-10-23_04:2019-10-23,2019-10-23 signatures=0 Subject: [dpdk-dev] [PATCH v2 2/2] net/octeontx2: add support to parse higig2 hdr X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kiran Kumar K Adding support to parse higig2 header in RTE flow for octeontx2. And added devargs to configure port for higig2. Signed-off-by: Kiran Kumar K --- V2 Changes: * Fixed checkpatch issue doc/guides/nics/octeontx2.rst | 2 ++ drivers/common/octeontx2/hw/otx2_npc.h | 2 ++ drivers/net/octeontx2/otx2_flow.c | 1 + drivers/net/octeontx2/otx2_flow.h | 3 ++ drivers/net/octeontx2/otx2_flow_parse.c | 47 +++++++++++++++++++++++++ 5 files changed, 55 insertions(+) -- 2.17.1 diff --git a/doc/guides/nics/octeontx2.rst b/doc/guides/nics/octeontx2.rst index adf7c7131..eb7aaa468 100644 --- a/doc/guides/nics/octeontx2.rst +++ b/doc/guides/nics/octeontx2.rst @@ -288,6 +288,8 @@ Patterns: +----+--------------------------------+ | 23 | RTE_FLOW_ITEM_TYPE_GRE_KEY | +----+--------------------------------+ + | 24 | RTE_FLOW_ITEM_TYPE_HIGIG2 | + +----+--------------------------------+ .. note:: diff --git a/drivers/common/octeontx2/hw/otx2_npc.h b/drivers/common/octeontx2/hw/otx2_npc.h index 5b8d3ed8c..a0536e0ae 100644 --- a/drivers/common/octeontx2/hw/otx2_npc.h +++ b/drivers/common/octeontx2/hw/otx2_npc.h @@ -182,6 +182,8 @@ enum npc_kpu_la_ltype { NPC_LT_LA_IH_8_ETHER, NPC_LT_LA_IH_4_ETHER, NPC_LT_LA_IH_2_ETHER, + NPC_LT_LA_HIGIG2_ETHER, + NPC_LT_LA_IH_NIX_HIGIG2_ETHER, }; enum npc_kpu_lb_ltype { diff --git a/drivers/net/octeontx2/otx2_flow.c b/drivers/net/octeontx2/otx2_flow.c index bdbf123a9..f1fb9f988 100644 --- a/drivers/net/octeontx2/otx2_flow.c +++ b/drivers/net/octeontx2/otx2_flow.c @@ -325,6 +325,7 @@ flow_parse_pattern(struct rte_eth_dev *dev, { flow_parse_stage_func_t parse_stage_funcs[] = { flow_parse_meta_items, + otx2_flow_parse_higig2_hdr, otx2_flow_parse_la, otx2_flow_parse_lb, otx2_flow_parse_lc, diff --git a/drivers/net/octeontx2/otx2_flow.h b/drivers/net/octeontx2/otx2_flow.h index 6bfd5afde..df78f41d3 100644 --- a/drivers/net/octeontx2/otx2_flow.h +++ b/drivers/net/octeontx2/otx2_flow.h @@ -29,6 +29,7 @@ enum { #define NPC_IH_LENGTH 8 #define NPC_TPID_LENGTH 2 +#define NPC_HIGIG2_LENGTH 16 #define NPC_COUNTER_NONE (-1) /* 32 bytes from LDATA_CFG & 32 bytes from FLAGS_CFG */ #define NPC_MAX_EXTRACT_DATA_LEN (64) @@ -382,6 +383,8 @@ int otx2_flow_parse_lb(struct otx2_parse_state *pst); int otx2_flow_parse_la(struct otx2_parse_state *pst); +int otx2_flow_parse_higig2_hdr(struct otx2_parse_state *pst); + int otx2_flow_parse_actions(struct rte_eth_dev *dev, const struct rte_flow_attr *attr, const struct rte_flow_action actions[], diff --git a/drivers/net/octeontx2/otx2_flow_parse.c b/drivers/net/octeontx2/otx2_flow_parse.c index 2cba0a447..b7b7b6127 100644 --- a/drivers/net/octeontx2/otx2_flow_parse.c +++ b/drivers/net/octeontx2/otx2_flow_parse.c @@ -675,6 +675,15 @@ otx2_flow_parse_la(struct otx2_parse_state *pst) if (pst->flow->nix_intf == NIX_INTF_TX) { lt = NPC_LT_LA_IH_NIX_ETHER; info.hw_hdr_len = NPC_IH_LENGTH; + if (pst->npc->switch_header_type == OTX2_PRIV_FLAGS_HIGIG) { + lt = NPC_LT_LA_IH_NIX_HIGIG2_ETHER; + info.hw_hdr_len += NPC_HIGIG2_LENGTH; + } + } else { + if (pst->npc->switch_header_type == OTX2_PRIV_FLAGS_HIGIG) { + lt = NPC_LT_LA_HIGIG2_ETHER; + info.hw_hdr_len = NPC_HIGIG2_LENGTH; + } } /* Prepare for parsing the item */ @@ -694,6 +703,44 @@ otx2_flow_parse_la(struct otx2_parse_state *pst) return otx2_flow_update_parse_state(pst, &info, lid, lt, 0); } +int +otx2_flow_parse_higig2_hdr(struct otx2_parse_state *pst) +{ + struct rte_flow_item_higig2_hdr hw_mask; + struct otx2_flow_item_info info; + int lid, lt; + int rc; + + /* Identify the pattern type into lid, lt */ + if (pst->pattern->type != RTE_FLOW_ITEM_TYPE_HIGIG2) + return 0; + + lid = NPC_LID_LA; + lt = NPC_LT_LA_HIGIG2_ETHER; + info.hw_hdr_len = 0; + + if (pst->flow->nix_intf == NIX_INTF_TX) { + lt = NPC_LT_LA_IH_NIX_HIGIG2_ETHER; + info.hw_hdr_len = NPC_IH_LENGTH; + } + + /* Prepare for parsing the item */ + info.def_mask = &rte_flow_item_higig2_hdr_mask; + info.hw_mask = &hw_mask; + info.len = sizeof(struct rte_flow_item_higig2_hdr); + otx2_flow_get_hw_supp_mask(pst, &info, lid, lt); + info.spec = NULL; + info.mask = NULL; + + /* Basic validation of item parameters */ + rc = otx2_flow_parse_item_basic(pst->pattern, &info, pst->error); + if (rc) + return rc; + + /* Update pst if not validate only? clash check? */ + return otx2_flow_update_parse_state(pst, &info, lid, lt, 0); +} + static int parse_rss_action(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,