[v2,2/2] net/octeontx2: add support to parse higig2 hdr
diff mbox series

Message ID 20191023152549.18658-2-kirankumark@marvell.com
State Accepted, archived
Delegated to: Jerin Jacob
Headers show
Series
  • [v2,1/2] net/octeontx2: add support to enable switch type
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Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation fail Compilation issues

Commit Message

Kiran Kumar Kokkilagadda Oct. 23, 2019, 3:25 p.m. UTC
From: Kiran Kumar K <kirankumark@marvell.com>

Adding support to parse higig2 header in RTE flow for octeontx2.
And added devargs to configure port for higig2.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
---
V2 Changes:
* Fixed checkpatch issue

 doc/guides/nics/octeontx2.rst           |  2 ++
 drivers/common/octeontx2/hw/otx2_npc.h  |  2 ++
 drivers/net/octeontx2/otx2_flow.c       |  1 +
 drivers/net/octeontx2/otx2_flow.h       |  3 ++
 drivers/net/octeontx2/otx2_flow_parse.c | 47 +++++++++++++++++++++++++
 5 files changed, 55 insertions(+)

--
2.17.1

Patch
diff mbox series

diff --git a/doc/guides/nics/octeontx2.rst b/doc/guides/nics/octeontx2.rst
index adf7c7131..eb7aaa468 100644
--- a/doc/guides/nics/octeontx2.rst
+++ b/doc/guides/nics/octeontx2.rst
@@ -288,6 +288,8 @@  Patterns:
    +----+--------------------------------+
    | 23 | RTE_FLOW_ITEM_TYPE_GRE_KEY     |
    +----+--------------------------------+
+   | 24 | RTE_FLOW_ITEM_TYPE_HIGIG2      |
+   +----+--------------------------------+

 .. note::

diff --git a/drivers/common/octeontx2/hw/otx2_npc.h b/drivers/common/octeontx2/hw/otx2_npc.h
index 5b8d3ed8c..a0536e0ae 100644
--- a/drivers/common/octeontx2/hw/otx2_npc.h
+++ b/drivers/common/octeontx2/hw/otx2_npc.h
@@ -182,6 +182,8 @@  enum npc_kpu_la_ltype {
 	NPC_LT_LA_IH_8_ETHER,
 	NPC_LT_LA_IH_4_ETHER,
 	NPC_LT_LA_IH_2_ETHER,
+	NPC_LT_LA_HIGIG2_ETHER,
+	NPC_LT_LA_IH_NIX_HIGIG2_ETHER,
 };

 enum npc_kpu_lb_ltype {
diff --git a/drivers/net/octeontx2/otx2_flow.c b/drivers/net/octeontx2/otx2_flow.c
index bdbf123a9..f1fb9f988 100644
--- a/drivers/net/octeontx2/otx2_flow.c
+++ b/drivers/net/octeontx2/otx2_flow.c
@@ -325,6 +325,7 @@  flow_parse_pattern(struct rte_eth_dev *dev,
 {
 	flow_parse_stage_func_t parse_stage_funcs[] = {
 		flow_parse_meta_items,
+		otx2_flow_parse_higig2_hdr,
 		otx2_flow_parse_la,
 		otx2_flow_parse_lb,
 		otx2_flow_parse_lc,
diff --git a/drivers/net/octeontx2/otx2_flow.h b/drivers/net/octeontx2/otx2_flow.h
index 6bfd5afde..df78f41d3 100644
--- a/drivers/net/octeontx2/otx2_flow.h
+++ b/drivers/net/octeontx2/otx2_flow.h
@@ -29,6 +29,7 @@  enum {

 #define NPC_IH_LENGTH			8
 #define NPC_TPID_LENGTH			2
+#define NPC_HIGIG2_LENGTH		16
 #define NPC_COUNTER_NONE		(-1)
 /* 32 bytes from LDATA_CFG & 32 bytes from FLAGS_CFG */
 #define NPC_MAX_EXTRACT_DATA_LEN	(64)
@@ -382,6 +383,8 @@  int otx2_flow_parse_lb(struct otx2_parse_state *pst);

 int otx2_flow_parse_la(struct otx2_parse_state *pst);

+int otx2_flow_parse_higig2_hdr(struct otx2_parse_state *pst);
+
 int otx2_flow_parse_actions(struct rte_eth_dev *dev,
 			    const struct rte_flow_attr *attr,
 			    const struct rte_flow_action actions[],
diff --git a/drivers/net/octeontx2/otx2_flow_parse.c b/drivers/net/octeontx2/otx2_flow_parse.c
index 2cba0a447..b7b7b6127 100644
--- a/drivers/net/octeontx2/otx2_flow_parse.c
+++ b/drivers/net/octeontx2/otx2_flow_parse.c
@@ -675,6 +675,15 @@  otx2_flow_parse_la(struct otx2_parse_state *pst)
 	if (pst->flow->nix_intf == NIX_INTF_TX) {
 		lt = NPC_LT_LA_IH_NIX_ETHER;
 		info.hw_hdr_len = NPC_IH_LENGTH;
+		if (pst->npc->switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
+			lt = NPC_LT_LA_IH_NIX_HIGIG2_ETHER;
+			info.hw_hdr_len += NPC_HIGIG2_LENGTH;
+		}
+	} else {
+		if (pst->npc->switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
+			lt = NPC_LT_LA_HIGIG2_ETHER;
+			info.hw_hdr_len = NPC_HIGIG2_LENGTH;
+		}
 	}

 	/* Prepare for parsing the item */
@@ -694,6 +703,44 @@  otx2_flow_parse_la(struct otx2_parse_state *pst)
 	return otx2_flow_update_parse_state(pst, &info, lid, lt, 0);
 }

+int
+otx2_flow_parse_higig2_hdr(struct otx2_parse_state *pst)
+{
+	struct rte_flow_item_higig2_hdr hw_mask;
+	struct otx2_flow_item_info info;
+	int lid, lt;
+	int rc;
+
+	/* Identify the pattern type into lid, lt */
+	if (pst->pattern->type != RTE_FLOW_ITEM_TYPE_HIGIG2)
+		return 0;
+
+	lid = NPC_LID_LA;
+	lt = NPC_LT_LA_HIGIG2_ETHER;
+	info.hw_hdr_len = 0;
+
+	if (pst->flow->nix_intf == NIX_INTF_TX) {
+		lt = NPC_LT_LA_IH_NIX_HIGIG2_ETHER;
+		info.hw_hdr_len = NPC_IH_LENGTH;
+	}
+
+	/* Prepare for parsing the item */
+	info.def_mask = &rte_flow_item_higig2_hdr_mask;
+	info.hw_mask = &hw_mask;
+	info.len = sizeof(struct rte_flow_item_higig2_hdr);
+	otx2_flow_get_hw_supp_mask(pst, &info, lid, lt);
+	info.spec = NULL;
+	info.mask = NULL;
+
+	/* Basic validation of item parameters */
+	rc = otx2_flow_parse_item_basic(pst->pattern, &info, pst->error);
+	if (rc)
+		return rc;
+
+	/* Update pst if not validate only? clash check? */
+	return otx2_flow_update_parse_state(pst, &info, lid, lt, 0);
+}
+
 static int
 parse_rss_action(struct rte_eth_dev *dev,
 		 const struct rte_flow_attr *attr,