[v6,04/17] raw/ifpga/base: add SEU error support

Message ID 1568883774-92149-5-git-send-email-andy.pei@intel.com (mailing list archive)
State Superseded, archived
Delegated to: xiaolong ye
Headers
Series add PCIe AER disable and IRQ support for ipn3ke |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation fail Compilation issues

Commit Message

Pei, Andy Sept. 19, 2019, 9:02 a.m. UTC
  From: Tianfei zhang <tianfei.zhang@intel.com>

This patch exposes SEU error information to application then application
could compare this information (128bit) with its own SMH file to know
if this SEU is a fatal error or not.

Signed-off-by: Tianfei zhang <tianfei.zhang@intel.com>
Signed-off-by: Andy Pei <andy.pei@intel.com>
---
 drivers/raw/ifpga/base/ifpga_defines.h     |  5 +++-
 drivers/raw/ifpga/base/ifpga_fme_error.c   | 43 ++++++++++++++++++++++++++++++
 drivers/raw/ifpga/base/opae_ifpga_hw_api.h |  2 ++
 3 files changed, 49 insertions(+), 1 deletion(-)
  

Comments

Xiaolong Ye Sept. 24, 2019, 4:37 p.m. UTC | #1
On 09/19, Andy Pei wrote:
>From: Tianfei zhang <tianfei.zhang@intel.com>
>
>This patch exposes SEU error information to application then application
>could compare this information (128bit) with its own SMH file to know
>if this SEU is a fatal error or not.
>
>Signed-off-by: Tianfei zhang <tianfei.zhang@intel.com>
>Signed-off-by: Andy Pei <andy.pei@intel.com>
>---
> drivers/raw/ifpga/base/ifpga_defines.h     |  5 +++-
> drivers/raw/ifpga/base/ifpga_fme_error.c   | 43 ++++++++++++++++++++++++++++++
> drivers/raw/ifpga/base/opae_ifpga_hw_api.h |  2 ++
> 3 files changed, 49 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/raw/ifpga/base/ifpga_defines.h b/drivers/raw/ifpga/base/ifpga_defines.h
>index 4216128..b450cb1 100644
>--- a/drivers/raw/ifpga/base/ifpga_defines.h
>+++ b/drivers/raw/ifpga/base/ifpga_defines.h
>@@ -1149,7 +1149,8 @@ struct feature_fme_error_capability {
> 			u8 support_intr:1;
> 			/* MSI-X vector table entry number */
> 			u16 intr_vector_num:12;
>-			u64 rsvd:51;	/* Reserved */
>+			u64 rsvd:50;	/* Reserved */
>+			u64 seu_support:1;
> 		};
> 	};
> };
>@@ -1171,6 +1172,8 @@ struct feature_fme_err {
> 	struct feature_fme_ras_catfaterror ras_catfaterr;
> 	struct feature_fme_ras_error_inj ras_error_inj;
> 	struct feature_fme_error_capability fme_err_capability;
>+	u64 seu_emr_l;
>+	u64 seu_emr_h;
> };
> 
> /* FME Partial Reconfiguration Control */
>diff --git a/drivers/raw/ifpga/base/ifpga_fme_error.c b/drivers/raw/ifpga/base/ifpga_fme_error.c
>index a6d3dab..c9bac15 100644
>--- a/drivers/raw/ifpga/base/ifpga_fme_error.c
>+++ b/drivers/raw/ifpga/base/ifpga_fme_error.c
>@@ -257,6 +257,45 @@ static void fme_global_error_uinit(struct ifpga_feature *feature)
> 	UNUSED(feature);
> }
> 
>+static int fme_err_check_seu(struct feature_fme_err *fme_err)
>+{
>+	struct feature_fme_error_capability error_cap;
>+
>+	error_cap.csr = readq(&fme_err->fme_err_capability);
>+
>+	return error_cap.seu_support ? 1 : 0;
>+}
>+
>+static int fme_err_get_seu_emr_low(struct ifpga_fme_hw *fme,
>+		u64 *val)
>+{
>+	struct feature_fme_err *fme_err
>+		= get_fme_feature_ioaddr_by_index(fme,
>+						  FME_FEATURE_ID_GLOBAL_ERR);
>+
>+	if (!fme_err_check_seu(fme_err))
>+		return -ENODEV;
>+
>+	*val = readq(&fme_err->seu_emr_l);
>+
>+	return 0;
>+}
>+
>+static int fme_err_get_seu_emr_high(struct ifpga_fme_hw *fme,
>+		u64 *val)
>+{
>+	struct feature_fme_err *fme_err
>+		= get_fme_feature_ioaddr_by_index(fme,
>+						  FME_FEATURE_ID_GLOBAL_ERR);
>+
>+	if (!fme_err_check_seu(fme_err))
>+		return -ENODEV;
>+
>+	*val = readq(&fme_err->seu_emr_h);
>+
>+	return 0;
>+}

Above 2 functions can be combined to reduce duplication.

>+
> static int fme_err_fme_err_get_prop(struct ifpga_feature *feature,
> 				    struct feature_prop *prop)
> {
>@@ -270,6 +309,10 @@ static int fme_err_fme_err_get_prop(struct ifpga_feature *feature,
> 		return fme_err_get_first_error(fme, &prop->data);
> 	case 0x3: /* NEXT_ERROR */
> 		return fme_err_get_next_error(fme, &prop->data);
>+	case 0x5: /* SEU EMR LOW */
>+		return fme_err_get_seu_emr_low(fme, &prop->data);
>+	case 0x6: /* SEU EMR HIGH */
>+		return fme_err_get_seu_emr_high(fme, &prop->data);
> 	}
> 
> 	return -ENOENT;
>diff --git a/drivers/raw/ifpga/base/opae_ifpga_hw_api.h b/drivers/raw/ifpga/base/opae_ifpga_hw_api.h
>index 4c2c990..bab3386 100644
>--- a/drivers/raw/ifpga/base/opae_ifpga_hw_api.h
>+++ b/drivers/raw/ifpga/base/opae_ifpga_hw_api.h
>@@ -74,6 +74,8 @@ struct feature_prop {
> #define FME_ERR_PROP_FIRST_ERROR	ERR_PROP_FME_ERR(0x2)
> #define FME_ERR_PROP_NEXT_ERROR		ERR_PROP_FME_ERR(0x3)
> #define FME_ERR_PROP_CLEAR		ERR_PROP_FME_ERR(0x4)	/* WO */
>+#define FME_ERR_PROP_SEU_EMR_LOW        ERR_PROP_FME_ERR(0x5)
>+#define FME_ERR_PROP_SEU_EMR_HIGH       ERR_PROP_FME_ERR(0x6)
> #define FME_ERR_PROP_REVISION		ERR_PROP_ROOT(0x5)
> #define FME_ERR_PROP_PCIE0_ERRORS	ERR_PROP_ROOT(0x6)	/* RW */
> #define FME_ERR_PROP_PCIE1_ERRORS	ERR_PROP_ROOT(0x7)	/* RW */
>-- 
>1.8.3.1
>
  
Zhang, Tianfei Sept. 25, 2019, 12:55 a.m. UTC | #2
> -----Original Message-----
> From: Ye, Xiaolong
> Sent: Wednesday, September 25, 2019 12:37 AM
> To: Pei, Andy <andy.pei@intel.com>
> Cc: dev@dpdk.org; Xu, Rosen <rosen.xu@intel.com>; Zhang, Tianfei
> <tianfei.zhang@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>; Lomartire,
> David <david.lomartire@intel.com>; Yigit, Ferruh <ferruh.yigit@intel.com>
> Subject: Re: [PATCH v6 04/17] raw/ifpga/base: add SEU error support
> 
> On 09/19, Andy Pei wrote:
> >From: Tianfei zhang <tianfei.zhang@intel.com>
> >
> >This patch exposes SEU error information to application then
> >application could compare this information (128bit) with its own SMH
> >file to know if this SEU is a fatal error or not.
> >
> >Signed-off-by: Tianfei zhang <tianfei.zhang@intel.com>
> >Signed-off-by: Andy Pei <andy.pei@intel.com>
> >---
> > drivers/raw/ifpga/base/ifpga_defines.h     |  5 +++-
> > drivers/raw/ifpga/base/ifpga_fme_error.c   | 43
> ++++++++++++++++++++++++++++++
> > drivers/raw/ifpga/base/opae_ifpga_hw_api.h |  2 ++
> > 3 files changed, 49 insertions(+), 1 deletion(-)
> >
> >diff --git a/drivers/raw/ifpga/base/ifpga_defines.h
> >b/drivers/raw/ifpga/base/ifpga_defines.h
> >index 4216128..b450cb1 100644
> >--- a/drivers/raw/ifpga/base/ifpga_defines.h
> >+++ b/drivers/raw/ifpga/base/ifpga_defines.h
> >@@ -1149,7 +1149,8 @@ struct feature_fme_error_capability {
> > 			u8 support_intr:1;
> > 			/* MSI-X vector table entry number */
> > 			u16 intr_vector_num:12;
> >-			u64 rsvd:51;	/* Reserved */
> >+			u64 rsvd:50;	/* Reserved */
> >+			u64 seu_support:1;
> > 		};
> > 	};
> > };
> >@@ -1171,6 +1172,8 @@ struct feature_fme_err {
> > 	struct feature_fme_ras_catfaterror ras_catfaterr;
> > 	struct feature_fme_ras_error_inj ras_error_inj;
> > 	struct feature_fme_error_capability fme_err_capability;
> >+	u64 seu_emr_l;
> >+	u64 seu_emr_h;
> > };
> >
> > /* FME Partial Reconfiguration Control */ diff --git
> >a/drivers/raw/ifpga/base/ifpga_fme_error.c
> >b/drivers/raw/ifpga/base/ifpga_fme_error.c
> >index a6d3dab..c9bac15 100644
> >--- a/drivers/raw/ifpga/base/ifpga_fme_error.c
> >+++ b/drivers/raw/ifpga/base/ifpga_fme_error.c
> >@@ -257,6 +257,45 @@ static void fme_global_error_uinit(struct
> ifpga_feature *feature)
> > 	UNUSED(feature);
> > }
> >
> >+static int fme_err_check_seu(struct feature_fme_err *fme_err) {
> >+	struct feature_fme_error_capability error_cap;
> >+
> >+	error_cap.csr = readq(&fme_err->fme_err_capability);
> >+
> >+	return error_cap.seu_support ? 1 : 0; }
> >+
> >+static int fme_err_get_seu_emr_low(struct ifpga_fme_hw *fme,
> >+		u64 *val)
> >+{
> >+	struct feature_fme_err *fme_err
> >+		= get_fme_feature_ioaddr_by_index(fme,
> >+						  FME_FEATURE_ID_GLOBAL_ERR);
> >+
> >+	if (!fme_err_check_seu(fme_err))
> >+		return -ENODEV;
> >+
> >+	*val = readq(&fme_err->seu_emr_l);
> >+
> >+	return 0;
> >+}
> >+
> >+static int fme_err_get_seu_emr_high(struct ifpga_fme_hw *fme,
> >+		u64 *val)
> >+{
> >+	struct feature_fme_err *fme_err
> >+		= get_fme_feature_ioaddr_by_index(fme,
> >+						  FME_FEATURE_ID_GLOBAL_ERR);
> >+
> >+	if (!fme_err_check_seu(fme_err))
> >+		return -ENODEV;
> >+
> >+	*val = readq(&fme_err->seu_emr_h);
> >+
> >+	return 0;
> >+}
> 
> Above 2 functions can be combined to reduce duplication.
> 
Thanks your suggestion, I will fix it in next version.
  

Patch

diff --git a/drivers/raw/ifpga/base/ifpga_defines.h b/drivers/raw/ifpga/base/ifpga_defines.h
index 4216128..b450cb1 100644
--- a/drivers/raw/ifpga/base/ifpga_defines.h
+++ b/drivers/raw/ifpga/base/ifpga_defines.h
@@ -1149,7 +1149,8 @@  struct feature_fme_error_capability {
 			u8 support_intr:1;
 			/* MSI-X vector table entry number */
 			u16 intr_vector_num:12;
-			u64 rsvd:51;	/* Reserved */
+			u64 rsvd:50;	/* Reserved */
+			u64 seu_support:1;
 		};
 	};
 };
@@ -1171,6 +1172,8 @@  struct feature_fme_err {
 	struct feature_fme_ras_catfaterror ras_catfaterr;
 	struct feature_fme_ras_error_inj ras_error_inj;
 	struct feature_fme_error_capability fme_err_capability;
+	u64 seu_emr_l;
+	u64 seu_emr_h;
 };
 
 /* FME Partial Reconfiguration Control */
diff --git a/drivers/raw/ifpga/base/ifpga_fme_error.c b/drivers/raw/ifpga/base/ifpga_fme_error.c
index a6d3dab..c9bac15 100644
--- a/drivers/raw/ifpga/base/ifpga_fme_error.c
+++ b/drivers/raw/ifpga/base/ifpga_fme_error.c
@@ -257,6 +257,45 @@  static void fme_global_error_uinit(struct ifpga_feature *feature)
 	UNUSED(feature);
 }
 
+static int fme_err_check_seu(struct feature_fme_err *fme_err)
+{
+	struct feature_fme_error_capability error_cap;
+
+	error_cap.csr = readq(&fme_err->fme_err_capability);
+
+	return error_cap.seu_support ? 1 : 0;
+}
+
+static int fme_err_get_seu_emr_low(struct ifpga_fme_hw *fme,
+		u64 *val)
+{
+	struct feature_fme_err *fme_err
+		= get_fme_feature_ioaddr_by_index(fme,
+						  FME_FEATURE_ID_GLOBAL_ERR);
+
+	if (!fme_err_check_seu(fme_err))
+		return -ENODEV;
+
+	*val = readq(&fme_err->seu_emr_l);
+
+	return 0;
+}
+
+static int fme_err_get_seu_emr_high(struct ifpga_fme_hw *fme,
+		u64 *val)
+{
+	struct feature_fme_err *fme_err
+		= get_fme_feature_ioaddr_by_index(fme,
+						  FME_FEATURE_ID_GLOBAL_ERR);
+
+	if (!fme_err_check_seu(fme_err))
+		return -ENODEV;
+
+	*val = readq(&fme_err->seu_emr_h);
+
+	return 0;
+}
+
 static int fme_err_fme_err_get_prop(struct ifpga_feature *feature,
 				    struct feature_prop *prop)
 {
@@ -270,6 +309,10 @@  static int fme_err_fme_err_get_prop(struct ifpga_feature *feature,
 		return fme_err_get_first_error(fme, &prop->data);
 	case 0x3: /* NEXT_ERROR */
 		return fme_err_get_next_error(fme, &prop->data);
+	case 0x5: /* SEU EMR LOW */
+		return fme_err_get_seu_emr_low(fme, &prop->data);
+	case 0x6: /* SEU EMR HIGH */
+		return fme_err_get_seu_emr_high(fme, &prop->data);
 	}
 
 	return -ENOENT;
diff --git a/drivers/raw/ifpga/base/opae_ifpga_hw_api.h b/drivers/raw/ifpga/base/opae_ifpga_hw_api.h
index 4c2c990..bab3386 100644
--- a/drivers/raw/ifpga/base/opae_ifpga_hw_api.h
+++ b/drivers/raw/ifpga/base/opae_ifpga_hw_api.h
@@ -74,6 +74,8 @@  struct feature_prop {
 #define FME_ERR_PROP_FIRST_ERROR	ERR_PROP_FME_ERR(0x2)
 #define FME_ERR_PROP_NEXT_ERROR		ERR_PROP_FME_ERR(0x3)
 #define FME_ERR_PROP_CLEAR		ERR_PROP_FME_ERR(0x4)	/* WO */
+#define FME_ERR_PROP_SEU_EMR_LOW        ERR_PROP_FME_ERR(0x5)
+#define FME_ERR_PROP_SEU_EMR_HIGH       ERR_PROP_FME_ERR(0x6)
 #define FME_ERR_PROP_REVISION		ERR_PROP_ROOT(0x5)
 #define FME_ERR_PROP_PCIE0_ERRORS	ERR_PROP_ROOT(0x6)	/* RW */
 #define FME_ERR_PROP_PCIE1_ERRORS	ERR_PROP_ROOT(0x7)	/* RW */