[v5,16/17] raw/ifpga/base: add new API get board info

Message ID 1568881185-89233-17-git-send-email-andy.pei@intel.com
State Superseded
Headers show
Series
  • Add PCIe AER disable and IRQ support for ipn3ke
Related show

Checks

Context Check Description
ci/Intel-compilation fail Compilation issues
ci/checkpatch success coding style OK

Commit Message

Andy Pei Sept. 19, 2019, 8:19 a.m.
From: Tianfei zhang <tianfei.zhang@intel.com>

Add new API to get the board info.
opae_mgr_get_board_info()

Signed-off-by: Tianfei zhang <tianfei.zhang@intel.com>
Signed-off-by: Andy Pei <andy.pei@intel.com>
---
 drivers/raw/ifpga/base/ifpga_api.c     | 11 +++++++
 drivers/raw/ifpga/base/ifpga_defines.h | 55 ++++++++++++++++++++++++++--------
 drivers/raw/ifpga/base/ifpga_fme.c     | 53 +++++++++++++++++++++++++-------
 drivers/raw/ifpga/base/ifpga_hw.h      |  2 +-
 drivers/raw/ifpga/base/opae_hw_api.c   | 20 +++++++++++++
 drivers/raw/ifpga/base/opae_hw_api.h   |  5 ++++
 6 files changed, 121 insertions(+), 25 deletions(-)

Patch

diff --git a/drivers/raw/ifpga/base/ifpga_api.c b/drivers/raw/ifpga/base/ifpga_api.c
index 33d1da3..6dbd715 100644
--- a/drivers/raw/ifpga/base/ifpga_api.c
+++ b/drivers/raw/ifpga/base/ifpga_api.c
@@ -218,10 +218,21 @@  static int ifpga_mgr_get_sensor_value(struct opae_manager *mgr,
 	return fme_mgr_get_sensor_value(fme, sensor, value);
 }
 
+static int ifpga_mgr_get_board_info(struct opae_manager *mgr,
+		struct opae_board_info **info)
+{
+	struct ifpga_fme_hw *fme = mgr->data;
+
+	*info = &fme->board_info;
+
+	return 0;
+}
+
 struct opae_manager_ops ifpga_mgr_ops = {
 	.flash = ifpga_mgr_flash,
 	.get_eth_group_region_info = ifpga_mgr_get_eth_group_region_info,
 	.get_sensor_value = ifpga_mgr_get_sensor_value,
+	.get_board_info = ifpga_mgr_get_board_info,
 };
 
 static int ifpga_mgr_read_mac_rom(struct opae_manager *mgr, int offset,
diff --git a/drivers/raw/ifpga/base/ifpga_defines.h b/drivers/raw/ifpga/base/ifpga_defines.h
index 1e84b15..e529f54 100644
--- a/drivers/raw/ifpga/base/ifpga_defines.h
+++ b/drivers/raw/ifpga/base/ifpga_defines.h
@@ -1667,18 +1667,29 @@  struct bts_header {
 	(((bts_hdr)->guid_h == GBS_GUID_H) &&		\
 	((bts_hdr)->guid_l == GBS_GUID_L))
 
+#define check_support(n) (n == 1 ? "support" : "no")
+
 /* bitstream id definition */
 struct fme_bitstream_id {
 	union {
 		u64 id;
 		struct {
-			u64 hash:32;
-			u64 interface:4;
-			u64 reserved:12;
-			u64 debug:4;
-			u64 patch:4;
-			u64 minor:4;
-			u64 major:4;
+			u8 build_patch:8;
+			u8 build_minor:8;
+			u8 build_major:8;
+			u8 fvl_bypass:1;
+			u8 mac_lightweight:1;
+			u8 disagregate:1;
+			u8 lightweiht:1;
+			u8 seu:1;
+			u8 ptp:1;
+			u8 reserve:2;
+			u8 interface:4;
+			u32 afu_revision:12;
+			u8 patch:4;
+			u8 minor:4;
+			u8 major:4;
+			u8 reserved:4;
 		};
 	};
 };
@@ -1691,13 +1702,31 @@  enum board_interface {
 	VC_2_2_25G = 4,
 };
 
-struct ifpga_fme_board_info {
+enum pac_major {
+	VISTA_CREEK = 0,
+	RUSH_CREEK = 1,
+	DARBY_CREEK = 2,
+};
+
+enum pac_minor {
+	DCP_1_0 = 0,
+	DCP_1_1 = 1,
+	DCP_1_2 = 2,
+};
+
+struct opae_board_info {
+	enum pac_major major;
+	enum pac_minor minor;
 	enum board_interface type;
-	u32 build_hash;
-	u32 debug_version;
-	u32 patch_version;
-	u32 minor_version;
-	u32 major_version;
+
+	/* PAC features */
+	u8 fvl_bypass;
+	u8 mac_lightweight;
+	u8 disagregate;
+	u8 lightweiht;
+	u8 seu;
+	u8 ptp;
+
 	u32 max10_version;
 	u32 nios_fw_version;
 	u32 nums_of_retimer;
diff --git a/drivers/raw/ifpga/base/ifpga_fme.c b/drivers/raw/ifpga/base/ifpga_fme.c
index 2bc7c10..1ebafae 100644
--- a/drivers/raw/ifpga/base/ifpga_fme.c
+++ b/drivers/raw/ifpga/base/ifpga_fme.c
@@ -787,8 +787,22 @@  static const char *board_type_to_string(u32 type)
 	return "unknown";
 }
 
+static const char *board_major_to_string(u32 major)
+{
+	switch (major) {
+	case VISTA_CREEK:
+		return "VISTA_CREEK";
+	case RUSH_CREEK:
+		return "RUSH_CREEK";
+	case DARBY_CREEK:
+		return "DARBY_CREEK";
+	}
+
+	return "unknown";
+}
+
 static int board_type_to_info(u32 type,
-		struct ifpga_fme_board_info *info)
+		struct opae_board_info *info)
 {
 	switch (type) {
 	case VC_8_10G:
@@ -830,17 +844,34 @@  static int fme_get_board_interface(struct ifpga_fme_hw *fme)
 	if (fme_hdr_get_bitstream_id(fme, &id.id))
 		return -EINVAL;
 
+	fme->board_info.major = id.major;
+	fme->board_info.minor = id.minor;
 	fme->board_info.type = id.interface;
-	fme->board_info.build_hash = id.hash;
-	fme->board_info.debug_version = id.debug;
-	fme->board_info.major_version = id.major;
-	fme->board_info.minor_version = id.minor;
-
-	dev_info(fme, "board type: %s major_version:%u minor_version:%u build_hash:%u\n",
-			board_type_to_string(fme->board_info.type),
-			fme->board_info.major_version,
-			fme->board_info.minor_version,
-			fme->board_info.build_hash);
+	fme->board_info.fvl_bypass = id.fvl_bypass;
+	fme->board_info.mac_lightweight = id.mac_lightweight;
+	fme->board_info.lightweiht = id.lightweiht;
+	fme->board_info.disagregate = id.disagregate;
+	fme->board_info.seu = id.seu;
+	fme->board_info.ptp = id.ptp;
+
+	dev_info(fme, "found: board: %s type: %s\n",
+			board_major_to_string(fme->board_info.major),
+			board_type_to_string(fme->board_info.type));
+
+	dev_info(fme, "support feature:\n"
+			"fvl_bypass:%s\n"
+			"mac_lightweight:%s\n"
+			"lightweiht:%s\n"
+			"disagregate:%s\n"
+			"seu:%s\n"
+			"ptp1588:%s\n",
+			check_support(fme->board_info.fvl_bypass),
+			check_support(fme->board_info.mac_lightweight),
+			check_support(fme->board_info.lightweiht),
+			check_support(fme->board_info.disagregate),
+			check_support(fme->board_info.seu),
+			check_support(fme->board_info.ptp));
+
 
 	if (board_type_to_info(fme->board_info.type, &fme->board_info))
 		return -EINVAL;
diff --git a/drivers/raw/ifpga/base/ifpga_hw.h b/drivers/raw/ifpga/base/ifpga_hw.h
index ff91c46..7c3307f 100644
--- a/drivers/raw/ifpga/base/ifpga_hw.h
+++ b/drivers/raw/ifpga/base/ifpga_hw.h
@@ -88,7 +88,7 @@  struct ifpga_fme_hw {
 	void *eth_dev[MAX_ETH_GROUP_DEVICES];
 	struct opae_reg_region
 		eth_group_region[MAX_ETH_GROUP_DEVICES];
-	struct ifpga_fme_board_info board_info;
+	struct opae_board_info board_info;
 	int nums_eth_dev;
 	unsigned int nums_acc_region;
 };
diff --git a/drivers/raw/ifpga/base/opae_hw_api.c b/drivers/raw/ifpga/base/opae_hw_api.c
index d0e66d6..1ccc967 100644
--- a/drivers/raw/ifpga/base/opae_hw_api.c
+++ b/drivers/raw/ifpga/base/opae_hw_api.c
@@ -690,3 +690,23 @@  struct opae_sensor_info *
 
 	return -ENOENT;
 }
+
+/**
+ * opae_manager_get_board_info - get board info
+ * sensor value
+ * @info: opae_board_info for the card
+ *
+ * Return: 0 on success, otherwise error code
+ */
+int
+opae_mgr_get_board_info(struct opae_manager *mgr,
+		struct opae_board_info **info)
+{
+	if (!mgr || !info)
+		return -EINVAL;
+
+	if (mgr->ops && mgr->ops->get_board_info)
+		return mgr->ops->get_board_info(mgr, info);
+
+	return -ENOENT;
+}
diff --git a/drivers/raw/ifpga/base/opae_hw_api.h b/drivers/raw/ifpga/base/opae_hw_api.h
index 0d7be01..b78fbd5 100644
--- a/drivers/raw/ifpga/base/opae_hw_api.h
+++ b/drivers/raw/ifpga/base/opae_hw_api.h
@@ -13,6 +13,7 @@ 
 #include "opae_osdep.h"
 #include "opae_intel_max10.h"
 #include "opae_eth_group.h"
+#include "ifpga_defines.h"
 
 #ifndef PCI_MAX_RESOURCE
 #define PCI_MAX_RESOURCE 6
@@ -51,6 +52,8 @@  struct opae_manager_ops {
 	int (*get_sensor_value)(struct opae_manager *mgr,
 			struct opae_sensor_info *sensor,
 			unsigned int *value);
+	int (*get_board_info)(struct opae_manager *mgr,
+			struct opae_board_info **info);
 };
 
 /* networking management ops in FME */
@@ -319,4 +322,6 @@  int opae_manager_eth_group_write_reg(struct opae_manager *mgr, u8 group_id,
 		u8 type, u8 index, u16 addr, u32 data);
 int opae_manager_eth_group_read_reg(struct opae_manager *mgr, u8 group_id,
 		u8 type, u8 index, u16 addr, u32 *data);
+int opae_mgr_get_board_info(struct opae_manager *mgr,
+		struct opae_board_info **info);
 #endif /* _OPAE_HW_API_H_*/