From patchwork Thu Sep 19 08:19:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Pei, Andy" X-Patchwork-Id: 59362 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 1DE341E990; Thu, 19 Sep 2019 10:34:11 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id C21141E974 for ; Thu, 19 Sep 2019 10:34:03 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Sep 2019 01:34:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,522,1559545200"; d="scan'208";a="387196771" Received: from dpdk-dipei.sh.intel.com ([10.67.110.224]) by fmsmga005.fm.intel.com with ESMTP; 19 Sep 2019 01:34:01 -0700 From: Andy Pei To: dev@dpdk.org Cc: rosen.xu@intel.com, tianfei.zhang@intel.com, xiaolong.ye@intel.com, qi.z.zhang@intel.com, david.lomartire@intel.com, ferruh.yigit@intel.com Date: Thu, 19 Sep 2019 16:19:29 +0800 Message-Id: <1568881185-89233-2-git-send-email-andy.pei@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1568881185-89233-1-git-send-email-andy.pei@intel.com> References: <1567652381-124289-2-git-send-email-andy.pei@intel.com> <1568881185-89233-1-git-send-email-andy.pei@intel.com> Subject: [dpdk-dev] [PATCH v5 01/17] net/i40e: i40e support ipn3ke FPGA port bonding X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" In ipn3ke, each FPGA network side port bonding to an i40e pf, each i40e pf link status should get data from FPGA network, side port. This patch provide bonding relationship. Signed-off-by: Rosen Xu Signed-off-by: Andy Pei --- drivers/net/i40e/base/i40e_type.h | 3 +++ drivers/net/i40e/i40e_ethdev.c | 20 ++++++++++++++++++++ drivers/net/i40e/rte_pmd_i40e.h | 4 ++++ 3 files changed, 27 insertions(+) diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h index 112866b..06863d7 100644 --- a/drivers/net/i40e/base/i40e_type.h +++ b/drivers/net/i40e/base/i40e_type.h @@ -660,6 +660,9 @@ struct i40e_hw { struct i40e_nvm_info nvm; struct i40e_fc_info fc; + /* switch device is used to get link status when i40e is in ipn3ke */ + struct rte_eth_dev *switch_dev; + /* pci info */ u16 device_id; u16 vendor_id; diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 4e40b7a..6c4b1e8 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -1312,6 +1312,9 @@ static inline void i40e_config_automask(struct i40e_pf *pf) hw->adapter_stopped = 0; hw->adapter_closed = 0; + /* Init switch device pointer */ + hw->switch_dev = NULL; + /* * Switch Tag value should not be identical to either the First Tag * or Second Tag values. So set something other than common Ethertype @@ -2782,6 +2785,20 @@ void i40e_flex_payload_reg_set_default(struct i40e_hw *hw) } } +void +i40e_set_switch_dev(struct rte_eth_dev *i40e_dev, +struct rte_eth_dev *switch_dev) +{ + struct i40e_hw *hw; + + if (!i40e_dev) + return; + + hw = I40E_DEV_PRIVATE_TO_HW(i40e_dev->data->dev_private); + + hw->switch_dev = switch_dev; +} + int i40e_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) @@ -2803,6 +2820,9 @@ void i40e_flex_payload_reg_set_default(struct i40e_hw *hw) else update_link_aq(hw, &link, enable_lse, wait_to_complete); + if (hw->switch_dev) + rte_eth_linkstatus_get(hw->switch_dev, &link); + ret = rte_eth_linkstatus_set(dev, &link); i40e_notify_all_vfs_link_status(dev); diff --git a/drivers/net/i40e/rte_pmd_i40e.h b/drivers/net/i40e/rte_pmd_i40e.h index faac9e2..9d77c85 100644 --- a/drivers/net/i40e/rte_pmd_i40e.h +++ b/drivers/net/i40e/rte_pmd_i40e.h @@ -1061,4 +1061,8 @@ int rte_pmd_i40e_inset_set(uint16_t port, uint8_t pctype, return 0; } +void +i40e_set_switch_dev(struct rte_eth_dev *i40e_dev, +struct rte_eth_dev *switch_dev); + #endif /* _PMD_I40E_H_ */