@@ -1105,6 +1105,12 @@ M: Nipun Gupta <nipun.gupta@nxp.com>
F: drivers/raw/dpaa2_cmdif/
F: doc/guides/rawdevs/dpaa2_cmdif.rst
+Marvell OCTEON TX2 DMA
+M: Satha Rao <skoteshwar@marvell.com>
+M: Vamsi Attunuru <vattunuru@marvell.com>
+F: drivers/raw/octeontx2_dma/
+F: doc/guides/rawdevs/octeontx2_dma.rst
+
Packet processing
-----------------
@@ -762,6 +762,11 @@ CONFIG_RTE_LIBRTE_PMD_IFPGA_RAWDEV=y
#
CONFIG_RTE_LIBRTE_PMD_IOAT_RAWDEV=y
+#
+# Compile PMD for octeontx2 DMA raw device
+#
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV=y
+
#
# Compile librte_ring
#
@@ -104,6 +104,9 @@ This section lists dataplane H/W block(s) available in OCTEON TX2 SoC.
#. **Event Device Driver**
See :doc:`../eventdevs/octeontx2` for SSO event device driver information.
+#. **DMA Rawdev Driver**
+ See :doc:`../rawdevs/octeontx2_dma` for DMA driver information.
+
Procedure to Setup Platform
---------------------------
@@ -146,6 +149,8 @@ compatible board:
# Enable if netdev VF driver required
CONFIG_OCTEONTX2_VF=y
CONFIG_CRYPTO_DEV_OCTEONTX2_CPT=y
+ # Enable if OCTEONTX2 DMA PF driver required
+ CONFIG_OCTEONTX2_DPI_PF=n
2. **ARM64 Linux Tool Chain**
@@ -15,3 +15,4 @@ application through rawdev API.
dpaa2_qdma
ifpga_rawdev
ioat_rawdev
+ octeontx2_dma
new file mode 100644
@@ -0,0 +1,64 @@
+.. SPDX-License-Identifier: BSD-3-Clause
+ Copyright(c) 2019 Marvell International Ltd.
+
+OCTEON TX2 DMA Driver
+=====================
+
+OCTEON TX2 has an internal DMA unit which can be used by applications to initiate
+DMA transaction internally, from/to host when OCTEON TX2 operates in PCIe End
+Point mode. The DMA PF function supports 8 VFs corresponding to 8 DMA queues.
+Each DMA queue was exposed as a VF function when SRIOV enabled.
+
+Features
+--------
+
+This DMA PMD supports below 3 modes of memory transfers
+
+#. Internal - OCTEON TX2 DRAM to DRAM without core intervention
+
+#. Inbound - Host DRAM to OCTEON TX2 DRAM without host/OCTEON TX2 cores involvement
+
+#. Outbound - OCTEON TX2 DRAM to Host DRAM without host/OCTEON TX2 cores involvement
+
+Prerequisites and Compilation procedure
+---------------------------------------
+
+ See :doc:`../platform/octeontx2` for setup information.
+
+
+Pre-Installation Configuration
+------------------------------
+
+Config File Options
+~~~~~~~~~~~~~~~~~~~
+
+The following options can be modified in the ``config`` file.
+
+- ``CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV`` (default ``y``)
+
+ Toggle compilation of the ``lrte_pmd_octeontx2_dma`` driver.
+
+Enabling logs
+-------------
+
+For enabling logs, use the following EAL parameter:
+
+.. code-block:: console
+
+ ./your_dma_application <EAL args> --log-level=pmd.raw.octeontx2.dpi,<level>
+
+Using ``pmd.raw.octeontx2.dpi`` as log matching criteria, all Event PMD logs
+can be enabled which are lower than logging ``level``.
+
+Initialization
+--------------
+
+The number of DMA VFs (queues) enabled can be controlled by setting sysfs
+entry, `sriov_numvfs` for the corresponding PF driver.
+
+.. code-block:: console
+
+ echo <num_vfs> > /sys/bus/pci/drivers/octeontx2-dpi/0000\:05\:00.0/sriov_numvfs
+
+Once the required VFs are enabled, to be accessible from DPDK, VFs need to be
+bound to vfio-pci driver.
@@ -11,5 +11,6 @@ DIRS-$(CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA_RAWDEV) += dpaa2_qdma
endif
DIRS-$(CONFIG_RTE_LIBRTE_PMD_IFPGA_RAWDEV) += ifpga_rawdev
DIRS-$(CONFIG_RTE_LIBRTE_PMD_IOAT_RAWDEV) += ioat
+DIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV) += octeontx2_dma
include $(RTE_SDK)/mk/rte.subdir.mk
@@ -3,6 +3,7 @@
drivers = ['dpaa2_cmdif', 'dpaa2_qdma',
'ifpga_rawdev', 'ioat',
+ 'octeontx2_dma',
'skeleton_rawdev']
std_deps = ['rawdev']
config_flag_fmt = 'RTE_LIBRTE_PMD_@0@_RAWDEV'
new file mode 100644
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(C) 2019 Marvell International Ltd.
+#
+
+include $(RTE_SDK)/mk/rte.vars.mk
+
+# library name
+LIB = librte_pmd_octeontx2_dma.a
+
+CFLAGS += -O3 $(WERROR_FLAGS)
+CFLAGS += -I$(RTE_SDK)/drivers/common/octeontx2/
+CFLAGS += -I$(RTE_SDK)/drivers/raw/octeontx2_dma/
+LDLIBS += -lrte_eal -lrte_rawdev -lrte_bus_pci
+LDLIBS += -lrte_common_octeontx2
+
+EXPORT_MAP := rte_pmd_octeontx2_dma_version.map
+
+LIBABIVER := 1
+
+#
+# all source are stored in SRCS-y
+#
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV) += otx2_dpi_rawdev.c
+
+include $(RTE_SDK)/mk/rte.lib.mk
new file mode 100644
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(C) 2019 Marvell International Ltd.
+#
+
+deps += ['bus_pci', 'common_octeontx2', 'rawdev']
+sources = files('otx2_dpi_rawdev.c')
new file mode 100644
@@ -0,0 +1,99 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#include <string.h>
+#include <unistd.h>
+
+#include <rte_bus.h>
+#include <rte_bus_pci.h>
+#include <rte_common.h>
+#include <rte_eal.h>
+#include <rte_lcore.h>
+#include <rte_pci.h>
+#include <rte_rawdev.h>
+#include <rte_rawdev_pmd.h>
+
+#include <otx2_common.h>
+
+static const struct rte_pci_id pci_dma_map[] = {
+ {
+ RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
+ PCI_DEVID_OCTEONTX2_DPI_VF)
+ },
+ {
+ .vendor_id = 0,
+ },
+};
+
+static int
+otx2_dpi_rawdev_probe(struct rte_pci_driver *pci_drv __rte_unused,
+ struct rte_pci_device *pci_dev)
+{
+ char name[RTE_RAWDEV_NAME_MAX_LEN];
+ struct rte_rawdev *rawdev;
+
+ /* For secondary processes, the primary has done all the work */
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ return 0;
+
+ if (pci_dev->mem_resource[0].addr == NULL) {
+ otx2_dpi_dbg("Empty bars %p %p", pci_dev->mem_resource[0].addr,
+ pci_dev->mem_resource[2].addr);
+ return -ENODEV;
+ }
+
+ memset(name, 0, sizeof(name));
+ snprintf(name, RTE_RAWDEV_NAME_MAX_LEN, "DPI:%x:%02x.%x",
+ pci_dev->addr.bus, pci_dev->addr.devid,
+ pci_dev->addr.function);
+
+ /* Allocate device structure */
+ rawdev = rte_rawdev_pmd_allocate(name, 0, rte_socket_id());
+ if (rawdev == NULL) {
+ otx2_err("Rawdev allocation failed");
+ return -EINVAL;
+ }
+
+ rawdev->device = &pci_dev->device;
+ rawdev->driver_name = pci_dev->driver->driver.name;
+
+ return 0;
+}
+
+static int
+otx2_dpi_rawdev_remove(struct rte_pci_device *pci_dev)
+{
+ char name[RTE_RAWDEV_NAME_MAX_LEN];
+ struct rte_rawdev *rawdev;
+
+ if (pci_dev == NULL) {
+ otx2_dpi_dbg("Invalid pci_dev of the device!");
+ return -EINVAL;
+ }
+
+ memset(name, 0, sizeof(name));
+ snprintf(name, RTE_RAWDEV_NAME_MAX_LEN, "DPI:%x:%02x.%x",
+ pci_dev->addr.bus, pci_dev->addr.devid,
+ pci_dev->addr.function);
+
+ rawdev = rte_rawdev_pmd_get_named_dev(name);
+ if (rawdev == NULL) {
+ otx2_dpi_dbg("Invalid device name (%s)", name);
+ return -EINVAL;
+ }
+
+ /* rte_rawdev_close is called by pmd_release */
+ return rte_rawdev_pmd_release(rawdev);
+}
+
+static struct rte_pci_driver rte_dpi_rawdev_pmd = {
+ .id_table = pci_dma_map,
+ .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_IOVA_AS_VA,
+ .probe = otx2_dpi_rawdev_probe,
+ .remove = otx2_dpi_rawdev_remove,
+};
+
+RTE_PMD_REGISTER_PCI(dpi_rawdev_pci_driver, rte_dpi_rawdev_pmd);
+RTE_PMD_REGISTER_PCI_TABLE(dpi_rawdev_pci_driver, pci_dma_map);
+RTE_PMD_REGISTER_KMOD_DEP(dpi_rawdev_pci_driver, "vfio-pci");
new file mode 100644
@@ -0,0 +1,4 @@
+DPDK_19.08 {
+
+ local: *;
+};
@@ -110,6 +110,7 @@ _LDLIBS-y += -lrte_common_octeontx
endif
OCTEONTX2-y := $(CONFIG_RTE_LIBRTE_OCTEONTX2_MEMPOOL)
OCTEONTX2-y += $(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV)
+OCTEONTX2-y += $(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV)
ifeq ($(findstring y,$(OCTEONTX2-y)),y)
_LDLIBS-y += -lrte_common_octeontx2
endif
@@ -310,6 +311,7 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_IFPGA_RAWDEV) += -lrte_pmd_ifpga_rawdev
_LDLIBS-$(CONFIG_RTE_LIBRTE_IPN3KE_PMD) += -lrte_pmd_ipn3ke
endif # CONFIG_RTE_LIBRTE_IFPGA_BUS
_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_IOAT_RAWDEV) += -lrte_pmd_ioat_rawdev
+_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV) += -lrte_pmd_octeontx2_dma
endif # CONFIG_RTE_LIBRTE_RAWDEV
endif # !CONFIG_RTE_BUILD_SHARED_LIBS