[2/7] net/ice/base: add API to support resource allocate

Message ID 20190115125658.15421-3-qi.z.zhang@intel.com (mailing list archive)
State Changes Requested, archived
Delegated to: Ferruh Yigit
Headers
Series net/ice: update share code |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Qi Zhang Jan. 15, 2019, 12:56 p.m. UTC
  Added API ice_alloc_hw_res and ice_free_hw_res.
Added resource type macro.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
---
 drivers/net/ice/base/ice_adminq_cmd.h | 27 +++++++++++++
 drivers/net/ice/base/ice_common.c     | 71 +++++++++++++++++++++++++++++++++++
 drivers/net/ice/base/ice_common.h     |  4 ++
 3 files changed, 102 insertions(+)
  

Patch

diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 9332f84aa..3003efd55 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -238,8 +238,35 @@  struct ice_aqc_get_sw_cfg_resp {
  * Free Resources command (indirect 0x0209)
  * Get Allocated Resource Descriptors Command (indirect 0x020A)
  */
+#define ICE_AQC_RES_TYPE_VEB_COUNTER			0x00
+#define ICE_AQC_RES_TYPE_VLAN_COUNTER			0x01
+#define ICE_AQC_RES_TYPE_MIRROR_RULE			0x02
 #define ICE_AQC_RES_TYPE_VSI_LIST_REP			0x03
 #define ICE_AQC_RES_TYPE_VSI_LIST_PRUNE			0x04
+#define ICE_AQC_RES_TYPE_RECIPE				0x05
+#define ICE_AQC_RES_TYPE_PROFILE			0x06
+#define ICE_AQC_RES_TYPE_SWID				0x07
+#define ICE_AQC_RES_TYPE_VSI				0x08
+#define ICE_AQC_RES_TYPE_FLU				0x09
+#define ICE_AQC_RES_TYPE_WIDE_TABLE_1			0x0A
+#define ICE_AQC_RES_TYPE_WIDE_TABLE_2			0x0B
+#define ICE_AQC_RES_TYPE_WIDE_TABLE_4			0x0C
+#define ICE_AQC_RES_TYPE_GLOBAL_RSS_HASH		0x20
+#define ICE_AQC_RES_TYPE_FDIR_COUNTER_BLOCK		0x21
+#define ICE_AQC_RES_TYPE_FDIR_GUARANTEED_ENTRIES	0x22
+#define ICE_AQC_RES_TYPE_FDIR_SHARED_ENTRIES		0x23
+#define ICE_AQC_RES_TYPE_FLEX_DESC_PROG			0x30
+#define ICE_AQC_RES_TYPE_SWITCH_PROF_BLDR_PROFID	0x48
+#define ICE_AQC_RES_TYPE_SWITCH_PROF_BLDR_TCAM		0x49
+#define ICE_AQC_RES_TYPE_ACL_PROF_BLDR_PROFID		0x50
+#define ICE_AQC_RES_TYPE_ACL_PROF_BLDR_TCAM		0x51
+#define ICE_AQC_RES_TYPE_FD_PROF_BLDR_PROFID		0x58
+#define ICE_AQC_RES_TYPE_FD_PROF_BLDR_TCAM		0x59
+#define ICE_AQC_RES_TYPE_HASH_PROF_BLDR_PROFID		0x60
+#define ICE_AQC_RES_TYPE_HASH_PROF_BLDR_TCAM		0x61
+/* Resource types 0x62-67 are reserved for Hash profile builder */
+#define ICE_AQC_RES_TYPE_QHASH_PROF_BLDR_PROFID		0x68
+#define ICE_AQC_RES_TYPE_QHASH_PROF_BLDR_TCAM		0x69
 
 #define ICE_AQC_RES_TYPE_FLAG_SHARED			BIT(7)
 #define ICE_AQC_RES_TYPE_FLAG_SCAN_BOTTOM		BIT(12)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 2ccf58527..145f66a90 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1712,6 +1712,77 @@  ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
 	return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
 }
 
+/**
+ * ice_alloc_hw_res - allocate resource
+ * @hw: pointer to the hw struct
+ * @type: type of resource
+ * @num: number of resources to allocate
+ * @sh: shared if true, dedicated if false
+ * @res: pointer to array that will receive the resources
+ */
+enum ice_status
+ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res)
+{
+	struct ice_aqc_alloc_free_res_elem *buf;
+	enum ice_status status;
+	u16 buf_len;
+
+	buf_len = sizeof(*buf) + sizeof(buf->elem) * (num - 1);
+	buf = (struct ice_aqc_alloc_free_res_elem *)
+		ice_malloc(hw, buf_len);
+	if (!buf)
+		return ICE_ERR_NO_MEMORY;
+
+	/* Prepare buffer to allocate resource. */
+	buf->num_elems = CPU_TO_LE16(num);
+	buf->res_type = CPU_TO_LE16(type | (sh ? ICE_AQC_RES_TYPE_FLAG_SHARED :
+		ICE_AQC_RES_TYPE_FLAG_DEDICATED));
+	status = ice_aq_alloc_free_res(hw, 1, buf, buf_len,
+				       ice_aqc_opc_alloc_res, NULL);
+	if (status)
+		goto ice_alloc_res_exit;
+
+	ice_memcpy(res, buf->elem, sizeof(buf->elem) * num,
+		   ICE_NONDMA_TO_NONDMA);
+
+ice_alloc_res_exit:
+	ice_free(hw, buf);
+	return status;
+}
+
+/**
+ * ice_free_hw_res - free allocated hw resource
+ * @hw: pointer to the hw struct
+ * @type: type of resource to free
+ * @num: number of resources
+ * @res: pointer to array that contains the resources to free
+ */
+enum ice_status
+ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res)
+{
+	struct ice_aqc_alloc_free_res_elem *buf;
+	enum ice_status status;
+	u16 buf_len;
+
+	buf_len = sizeof(*buf) + sizeof(buf->elem) * (num - 1);
+	buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
+	if (!buf)
+		return ICE_ERR_NO_MEMORY;
+
+	/* Prepare buffer to free resource. */
+	buf->num_elems = CPU_TO_LE16(num);
+	buf->res_type = CPU_TO_LE16(type);
+	ice_memcpy(buf->elem, res, sizeof(buf->elem) * num,
+		   ICE_NONDMA_TO_NONDMA);
+
+	status = ice_aq_alloc_free_res(hw, num, buf, buf_len,
+				       ice_aqc_opc_free_res, NULL);
+	if (status)
+		ice_debug(hw, ICE_DBG_SW, "CQ CMD Buffer:\n");
+
+	ice_free(hw, buf);
+	return status;
+}
 
 /**
  * ice_get_num_per_func - determine number of resources per PF
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 0197fbfe3..45d93eb64 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -32,6 +32,10 @@  ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
 		enum ice_aq_res_access_type access, u32 timeout);
 void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res);
 enum ice_status
+ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res);
+enum ice_status
+ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res);
+enum ice_status
 ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
 		      struct ice_aqc_alloc_free_res_elem *buf, u16 buf_size,
 		      enum ice_adminq_opc opc, struct ice_sq_cd *cd);