[v3] config: add Mellanox BlueField ARMv8 SoC

Message ID 20190110183919.42658-1-yskoh@mellanox.com
State Accepted, archived
Delegated to: Thomas Monjalon
Headers show
Series
  • [v3] config: add Mellanox BlueField ARMv8 SoC
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Checks

Context Check Description
ci/intel-Performance-Testing success Performance Testing PASS
ci/mellanox-Performance-Testing success Performance Testing PASS
ci/Intel-compilation success Compilation OK
ci/checkpatch warning coding style issues

Commit Message

Yongseok Koh Jan. 10, 2019, 6:39 p.m.
BlueField is Mellanox's new SoC based on ARMv8. BlueField integrates
Mellanox ConnectX-5 interconnect and Cortex-A72 cores into a single device.

http://www.mellanox.com/page/products_dyn?product_family=256&mtag=soc_overview

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
---

v3:
* remove redundant mlx5 config items

v2:
* remove config items which can be used for external PCIe device

 config/defconfig_arm64-bluefield-linuxapp-gcc | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
 create mode 100644 config/defconfig_arm64-bluefield-linuxapp-gcc

Comments

Gavin Hu (Arm Technology China) Jan. 11, 2019, 2:47 a.m. | #1
> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Yongseok Koh
> Sent: Friday, January 11, 2019 2:39 AM
> To: thomas@monjalon.net
> Cc: dev@dpdk.org; shahafs@mellanox.com; jerinj@marvell.com
> Subject: [dpdk-dev] [PATCH v3] config: add Mellanox BlueField ARMv8 SoC
>
> BlueField is Mellanox's new SoC based on ARMv8. BlueField integrates
> Mellanox ConnectX-5 interconnect and Cortex-A72 cores into a single
> device.
>
> http://www.mellanox.com/page/products_dyn?product_family=256&mtag=s
> oc_overview
>
> Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
> ---
>
> v3:
> * remove redundant mlx5 config items
>
> v2:
> * remove config items which can be used for external PCIe device
>
>  config/defconfig_arm64-bluefield-linuxapp-gcc | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
>  create mode 100644 config/defconfig_arm64-bluefield-linuxapp-gcc
>
> diff --git a/config/defconfig_arm64-bluefield-linuxapp-gcc
> b/config/defconfig_arm64-bluefield-linuxapp-gcc
> new file mode 100644
> index 0000000000..dd252c0e47
> --- /dev/null
> +++ b/config/defconfig_arm64-bluefield-linuxapp-gcc
> @@ -0,0 +1,18 @@
> +# SPDX-License-Identifier: BSD-3-Clause
> +# Copyright 2019 Mellanox Technologies, Ltd
> +#
> +
> +#include "defconfig_arm64-armv8a-linuxapp-gcc"
> +
> +# Mellanox BlueField
> +CONFIG_RTE_ARCH_ARM_TUNE="cortex-a72"
> +
> +CONFIG_RTE_MAX_NUMA_NODES=1
> +CONFIG_RTE_CACHE_LINE_SIZE=64
> +
> +# UMA architecture
> +CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
> +CONFIG_RTE_LIBRTE_VHOST_NUMA=n
> +
> +# PMD for ConnectX-5
> +CONFIG_RTE_LIBRTE_MLX5_PMD=y
> --
> 2.11.0

This is ok for make builds, meson build is also required, I think.

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Yongseok Koh Jan. 11, 2019, 7:50 a.m. | #2
> On Jan 10, 2019, at 6:47 PM, Gavin Hu (Arm Technology China) <Gavin.Hu@arm.com> wrote:
> 
> 
>> -----Original Message-----
>> From: dev <dev-bounces@dpdk.org> On Behalf Of Yongseok Koh
>> Sent: Friday, January 11, 2019 2:39 AM
>> To: thomas@monjalon.net
>> Cc: dev@dpdk.org; shahafs@mellanox.com; jerinj@marvell.com
>> Subject: [dpdk-dev] [PATCH v3] config: add Mellanox BlueField ARMv8 SoC
>> 
>> BlueField is Mellanox's new SoC based on ARMv8. BlueField integrates
>> Mellanox ConnectX-5 interconnect and Cortex-A72 cores into a single
>> device.
>> 
>> http://www.mellanox.com/page/products_dyn?product_family=256&mtag=s
>> oc_overview
>> 
>> Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
>> ---
>> 
>> v3:
>> * remove redundant mlx5 config items
>> 
>> v2:
>> * remove config items which can be used for external PCIe device
>> 
>> config/defconfig_arm64-bluefield-linuxapp-gcc | 18 ++++++++++++++++++
>> 1 file changed, 18 insertions(+)
>> create mode 100644 config/defconfig_arm64-bluefield-linuxapp-gcc
>> 
>> diff --git a/config/defconfig_arm64-bluefield-linuxapp-gcc
>> b/config/defconfig_arm64-bluefield-linuxapp-gcc
>> new file mode 100644
>> index 0000000000..dd252c0e47
>> --- /dev/null
>> +++ b/config/defconfig_arm64-bluefield-linuxapp-gcc
>> @@ -0,0 +1,18 @@
>> +# SPDX-License-Identifier: BSD-3-Clause
>> +# Copyright 2019 Mellanox Technologies, Ltd
>> +#
>> +
>> +#include "defconfig_arm64-armv8a-linuxapp-gcc"
>> +
>> +# Mellanox BlueField
>> +CONFIG_RTE_ARCH_ARM_TUNE="cortex-a72"
>> +
>> +CONFIG_RTE_MAX_NUMA_NODES=1
>> +CONFIG_RTE_CACHE_LINE_SIZE=64
>> +
>> +# UMA architecture
>> +CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
>> +CONFIG_RTE_LIBRTE_VHOST_NUMA=n
>> +
>> +# PMD for ConnectX-5
>> +CONFIG_RTE_LIBRTE_MLX5_PMD=y
>> --
>> 2.11.0
> 
> This is ok for make builds, meson build is also required, I think.

Thanks for the comment, Gavin.
Due to an issue [1], I will manage meson build by a separate patch [2].
Discussion is ongoing.

[1] https://mails.dpdk.org/archives/dev/2019-January/122441.html
[2] https://mails.dpdk.org/archives/dev/2019-January/thread.html#122620

Thanks,
Yongseok
Honnappa Nagarahalli Jan. 14, 2019, 6:12 a.m. | #3
> 
> BlueField is Mellanox's new SoC based on ARMv8. BlueField integrates
                                                                              ^^^^^^
Above should be changed to armv8

> Mellanox ConnectX-5 interconnect and Cortex-A72 cores into a single device.
> 
> http://www.mellanox.com/page/products_dyn?product_family=256&mtag=s
> oc_overview
> 
> Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
> ---
> 
> v3:
> * remove redundant mlx5 config items
> 
> v2:
> * remove config items which can be used for external PCIe device
> 
>  config/defconfig_arm64-bluefield-linuxapp-gcc | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
>  create mode 100644 config/defconfig_arm64-bluefield-linuxapp-gcc
> 
> diff --git a/config/defconfig_arm64-bluefield-linuxapp-gcc
> b/config/defconfig_arm64-bluefield-linuxapp-gcc
> new file mode 100644
> index 0000000000..dd252c0e47
> --- /dev/null
> +++ b/config/defconfig_arm64-bluefield-linuxapp-gcc
> @@ -0,0 +1,18 @@
> +# SPDX-License-Identifier: BSD-3-Clause # Copyright 2019 Mellanox
> +Technologies, Ltd #
> +
> +#include "defconfig_arm64-armv8a-linuxapp-gcc"
> +
> +# Mellanox BlueField
> +CONFIG_RTE_ARCH_ARM_TUNE="cortex-a72"
> +
> +CONFIG_RTE_MAX_NUMA_NODES=1
> +CONFIG_RTE_CACHE_LINE_SIZE=64
> +
> +# UMA architecture
> +CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
> +CONFIG_RTE_LIBRTE_VHOST_NUMA=n
> +
> +# PMD for ConnectX-5
> +CONFIG_RTE_LIBRTE_MLX5_PMD=y
> --
> 2.11.0
Honnappa Nagarahalli Jan. 14, 2019, 6:13 a.m. | #4
Similarly, the commit heading subject line also needs to change.

> 
> >
> > BlueField is Mellanox's new SoC based on ARMv8. BlueField integrates
>                                                                               ^^^^^^ Above should be
> changed to armv8
> 
> > Mellanox ConnectX-5 interconnect and Cortex-A72 cores into a single device.
> >
> >
> http://www.mellanox.com/page/products_dyn?product_family=256&mtag=s
> > oc_overview
> >
> > Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
> > ---
> >
> > v3:
> > * remove redundant mlx5 config items
> >
> > v2:
> > * remove config items which can be used for external PCIe device
> >
> >  config/defconfig_arm64-bluefield-linuxapp-gcc | 18 ++++++++++++++++++
> >  1 file changed, 18 insertions(+)
> >  create mode 100644 config/defconfig_arm64-bluefield-linuxapp-gcc
> >
> > diff --git a/config/defconfig_arm64-bluefield-linuxapp-gcc
> > b/config/defconfig_arm64-bluefield-linuxapp-gcc
> > new file mode 100644
> > index 0000000000..dd252c0e47
> > --- /dev/null
> > +++ b/config/defconfig_arm64-bluefield-linuxapp-gcc
> > @@ -0,0 +1,18 @@
> > +# SPDX-License-Identifier: BSD-3-Clause # Copyright 2019 Mellanox
> > +Technologies, Ltd #
> > +
> > +#include "defconfig_arm64-armv8a-linuxapp-gcc"
> > +
> > +# Mellanox BlueField
> > +CONFIG_RTE_ARCH_ARM_TUNE="cortex-a72"
> > +
> > +CONFIG_RTE_MAX_NUMA_NODES=1
> > +CONFIG_RTE_CACHE_LINE_SIZE=64
> > +
> > +# UMA architecture
> > +CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
> > +CONFIG_RTE_LIBRTE_VHOST_NUMA=n
> > +
> > +# PMD for ConnectX-5
> > +CONFIG_RTE_LIBRTE_MLX5_PMD=y
> > --
> > 2.11.0
Yongseok Koh Jan. 14, 2019, 10:11 a.m. | #5
> On Jan 13, 2019, at 10:13 PM, Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com> wrote:
> 
> Similarly, the commit heading subject line also needs to change.
> 
>> 
>>> 
>>> BlueField is Mellanox's new SoC based on ARMv8. BlueField integrates
>>                                                                              ^^^^^^ Above should be
>> changed to armv8

Good to know that, thanks, Honnappa.

Thomas, will you take care of it when you merge (hope you will :-)?
Shall I send out a new version?

Thanks,
Yongseok
>> 
>>> Mellanox ConnectX-5 interconnect and Cortex-A72 cores into a single device.
>>> 
>>> 
>> http://www.mellanox.com/page/products_dyn?product_family=256&mtag=s
>>> oc_overview
>>> 
>>> Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
>>> ---
>>> 
>>> v3:
>>> * remove redundant mlx5 config items
>>> 
>>> v2:
>>> * remove config items which can be used for external PCIe device
>>> 
>>> config/defconfig_arm64-bluefield-linuxapp-gcc | 18 ++++++++++++++++++
>>> 1 file changed, 18 insertions(+)
>>> create mode 100644 config/defconfig_arm64-bluefield-linuxapp-gcc
>>> 
>>> diff --git a/config/defconfig_arm64-bluefield-linuxapp-gcc
>>> b/config/defconfig_arm64-bluefield-linuxapp-gcc
>>> new file mode 100644
>>> index 0000000000..dd252c0e47
>>> --- /dev/null
>>> +++ b/config/defconfig_arm64-bluefield-linuxapp-gcc
>>> @@ -0,0 +1,18 @@
>>> +# SPDX-License-Identifier: BSD-3-Clause # Copyright 2019 Mellanox
>>> +Technologies, Ltd #
>>> +
>>> +#include "defconfig_arm64-armv8a-linuxapp-gcc"
>>> +
>>> +# Mellanox BlueField
>>> +CONFIG_RTE_ARCH_ARM_TUNE="cortex-a72"
>>> +
>>> +CONFIG_RTE_MAX_NUMA_NODES=1
>>> +CONFIG_RTE_CACHE_LINE_SIZE=64
>>> +
>>> +# UMA architecture
>>> +CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
>>> +CONFIG_RTE_LIBRTE_VHOST_NUMA=n
>>> +
>>> +# PMD for ConnectX-5
>>> +CONFIG_RTE_LIBRTE_MLX5_PMD=y
>>> --
>>> 2.11.0
>
Thomas Monjalon Jan. 14, 2019, 10:25 a.m. | #6
14/01/2019 11:11, Yongseok Koh:
> > On Jan 13, 2019, at 10:13 PM, Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com> wrote:
> > 
> > Similarly, the commit heading subject line also needs to change.
> > 
> >> 
> >>> 
> >>> BlueField is Mellanox's new SoC based on ARMv8. BlueField integrates
> >>                                                                              ^^^^^^ Above should be
> >> changed to armv8
> 
> Good to know that, thanks, Honnappa.
> 
> Thomas, will you take care of it when you merge (hope you will :-)?
> Shall I send out a new version?

Yes, that's fine, I will take care.
Thomas Monjalon Jan. 14, 2019, 10:47 a.m. | #7
10/01/2019 19:39, Yongseok Koh:
> BlueField is Mellanox's new SoC based on ARMv8. BlueField integrates
> Mellanox ConnectX-5 interconnect and Cortex-A72 cores into a single device.
> 
> http://www.mellanox.com/page/products_dyn?product_family=256&mtag=soc_overview
> 
> Signed-off-by: Yongseok Koh <yskoh@mellanox.com>

Applied with armv8 wording, thanks

Patch

diff --git a/config/defconfig_arm64-bluefield-linuxapp-gcc b/config/defconfig_arm64-bluefield-linuxapp-gcc
new file mode 100644
index 0000000000..dd252c0e47
--- /dev/null
+++ b/config/defconfig_arm64-bluefield-linuxapp-gcc
@@ -0,0 +1,18 @@ 
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright 2019 Mellanox Technologies, Ltd
+#
+
+#include "defconfig_arm64-armv8a-linuxapp-gcc"
+
+# Mellanox BlueField
+CONFIG_RTE_ARCH_ARM_TUNE="cortex-a72"
+
+CONFIG_RTE_MAX_NUMA_NODES=1
+CONFIG_RTE_CACHE_LINE_SIZE=64
+
+# UMA architecture
+CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
+CONFIG_RTE_LIBRTE_VHOST_NUMA=n
+
+# PMD for ConnectX-5
+CONFIG_RTE_LIBRTE_MLX5_PMD=y