diff mbox series

crypto/aesni_gcm: remove unneeded J0 calculation

Message ID 20180814005330.5595-1-pablo.de.lara.guarch@intel.com (mailing list archive)
State Accepted, archived
Delegated to: akhil goyal
Headers
Series crypto/aesni_gcm: remove unneeded J0 calculation |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

De Lara Guarch, Pablo Aug. 14, 2018, 12:53 a.m. UTC 
  When IV size is 12, padding to 16 bytes is required
and the LSB must be set to 1, according to the spec.
However, the Multi-buffer library is already doing this,
so it is not necessary to do it in the PMD.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
---
 drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 9 ---------
 1 file changed, 9 deletions(-)

Comments

Kovacevic, Marko Aug. 24, 2018, 12:55 p.m. UTC | #1 
> When IV size is 12, padding to 16 bytes is required and the LSB must be set to
> 1, according to the spec.
> However, the Multi-buffer library is already doing this, so it is not necessary
> to do it in the PMD.
> 
> Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
> ---
>  drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 9 ---------
>  1 file changed, 9 deletions(-)
> 

Acked-by: Marko Kovacevic <marko.kovacevic@intel.com>
Akhil Goyal Sept. 26, 2018, 12:27 p.m. UTC | #2 
On 8/14/2018 6:23 AM, Pablo de Lara wrote:
> When IV size is 12, padding to 16 bytes is required
> and the LSB must be set to 1, according to the spec.
> However, the Multi-buffer library is already doing this,
> so it is not necessary to do it in the PMD.
>
> Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
> ---
>
Applied to dpdk-next-crypto

Thanks
diff mbox series

Patch

diff --git a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
index 9b4d1f630..ebdf7c35a 100644
--- a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
+++ b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
@@ -240,17 +240,8 @@  process_gcm_crypto_op(struct aesni_gcm_qp *qp, struct rte_crypto_op *op,
 
 	iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
 				session->iv.offset);
-	/*
-	 * GCM working in 12B IV mode => 16B pre-counter block we need
-	 * to set BE LSB to 1, driver expects that 16B is allocated
-	 */
-	if (session->iv.length == 12) {
-		uint32_t *iv_padd = (uint32_t *)&(iv_ptr[12]);
-		*iv_padd = rte_bswap32(1);
-	}
 
 	if (session->op == AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION) {
-
 		qp->ops[session->key].init(&session->gdata_key,
 				&qp->gdata_ctx,
 				iv_ptr,