[v5] net/ixgbe: fix mask bits register set error for FDIR

Message ID 1529042883-39752-1-git-send-email-wei.zhao1@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Qi Zhang
Headers
Series [v5] net/ixgbe: fix mask bits register set error for FDIR |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Zhao1, Wei June 15, 2018, 6:08 a.m. UTC
  MAC address bits in mask registers should be set to zero
when the is mac mask is 0xFF, otherwise if it is 0x0
these bits should be to 0x3F.

Fixes: 82fb702077f6 ("ixgbe: support new flow director modes for X550")

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>

---

v2:
-change mask bits set method to support more mac mask.

v3:
-change mask and with 0x3F to macro definition.

v4:
-fix mask bits bug in v3.

v5:
-mask bits should be set only in tunnel mode.
---
 drivers/net/ixgbe/ixgbe_fdir.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)
  

Comments

Wenzhuo Lu June 19, 2018, 12:57 a.m. UTC | #1
Hi,


> -----Original Message-----
> From: Zhao1, Wei
> Sent: Friday, June 15, 2018 2:08 PM
> To: dev@dpdk.org
> Cc: Lu, Wenzhuo <wenzhuo.lu@intel.com>; stable@dpdk.org; Zhao1, Wei
> <wei.zhao1@intel.com>
> Subject: [PATCH v5] net/ixgbe: fix mask bits register set error for FDIR
> 
> MAC address bits in mask registers should be set to zero when the is mac
> mask is 0xFF, otherwise if it is 0x0 these bits should be to 0x3F.
> 
> Fixes: 82fb702077f6 ("ixgbe: support new flow director modes for X550")
> 
> Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
  
Qi Zhang June 21, 2018, 2:12 p.m. UTC | #2
> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Lu, Wenzhuo
> Sent: Tuesday, June 19, 2018 8:57 AM
> To: Zhao1, Wei <wei.zhao1@intel.com>; dev@dpdk.org
> Cc: stable@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH v5] net/ixgbe: fix mask bits register set error
> for FDIR
> 
> Hi,
> 
> 
> > -----Original Message-----
> > From: Zhao1, Wei
> > Sent: Friday, June 15, 2018 2:08 PM
> > To: dev@dpdk.org
> > Cc: Lu, Wenzhuo <wenzhuo.lu@intel.com>; stable@dpdk.org; Zhao1, Wei
> > <wei.zhao1@intel.com>
> > Subject: [PATCH v5] net/ixgbe: fix mask bits register set error for
> > FDIR
> >
> > MAC address bits in mask registers should be set to zero when the is
> > mac mask is 0xFF, otherwise if it is 0x0 these bits should be to 0x3F.
> >
> > Fixes: 82fb702077f6 ("ixgbe: support new flow director modes for
> > X550")
> >
> > Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
> Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>

Applied to dpdk-next-net-intel

Thanks!
Qi
  

Patch

diff --git a/drivers/net/ixgbe/ixgbe_fdir.c b/drivers/net/ixgbe/ixgbe_fdir.c
index 6baf825..e559f0f 100644
--- a/drivers/net/ixgbe/ixgbe_fdir.c
+++ b/drivers/net/ixgbe/ixgbe_fdir.c
@@ -394,9 +394,12 @@  fdir_set_input_mask_x550(struct rte_eth_dev *dev)
 				IXGBE_FDIRIP6M_TNI_VNI;
 
 	if (mode == RTE_FDIR_MODE_PERFECT_TUNNEL) {
-		mac_mask = info->mask.mac_addr_byte_mask;
-		fdiripv6m |= (mac_mask << IXGBE_FDIRIP6M_INNER_MAC_SHIFT)
-				& IXGBE_FDIRIP6M_INNER_MAC;
+		fdiripv6m |= IXGBE_FDIRIP6M_INNER_MAC;
+		mac_mask = info->mask.mac_addr_byte_mask &
+			(IXGBE_FDIRIP6M_INNER_MAC >>
+			IXGBE_FDIRIP6M_INNER_MAC_SHIFT);
+		fdiripv6m &= ~((mac_mask << IXGBE_FDIRIP6M_INNER_MAC_SHIFT) &
+				IXGBE_FDIRIP6M_INNER_MAC);
 
 		switch (info->mask.tunnel_type_mask) {
 		case 0: