From patchwork Thu Jun 7 09:43:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Krawczyk X-Patchwork-Id: 40722 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A4F6D1B1DF; Thu, 7 Jun 2018 11:43:47 +0200 (CEST) Received: from mail-lf0-f67.google.com (mail-lf0-f67.google.com [209.85.215.67]) by dpdk.org (Postfix) with ESMTP id AD7181B171 for ; Thu, 7 Jun 2018 11:43:40 +0200 (CEST) Received: by mail-lf0-f67.google.com with SMTP id n3-v6so13624005lfe.12 for ; Thu, 07 Jun 2018 02:43:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=yOhkPgeuxFr3Izg9Mc0fDQZggJFJFcgN58Ij9AGZ1Qg=; b=RG7B0DqMA8OFROnXM1gtI/Nmvd8QpEWSLCg7Apm+2j3mCe4mkp6FXtuUxqtw9UYQwM wu9HyrDFf3aK5mcDyIuf+5We5vdvXmNJgHqwT+NwrjGzex/V1vbxxOA/WbS0e8qQjTb6 9Ai5r+No2oL3uCFQSxwFVnpq1am0jkQL9WNmVxPlyC4I+w6ueeVwXhDhzrS9nYI/u3wv sVBjOZyENK/X9Kr2VfNvsvXvIGGWUjgnInjPtH2HL6BfiR777Se7NSPSBkEWqgvgyhSC HXkTRhcMG7GNOpV9PzWwa+4ThiCpGtT/T0rGmjildym/3DhNdO/RSJS9cNn/GckHUGzq sAuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=yOhkPgeuxFr3Izg9Mc0fDQZggJFJFcgN58Ij9AGZ1Qg=; b=Uue3us7su1rFU1OORd0+SWiB+0gd+9aimv2b4jlxmqjCdC/I7kYQ8T1yh6wT7/tn03 o1E9fd3S6bETLILk7gQhCQGdevGThIcbDSi3ig82xITyqFXY0X44LvOBUd08DdNZrt+7 3T8ctSAHMOK/W80H05NKfJOVnQrDRtLy6OY89dJv9MGJXDdO8HAbx6gWYIzXdDmJ8Sb7 JUgbclvQ6PCCogR3B0bi6Qu4tQXX0P//7ZSRbv5+QeRayHlTdp5tX3FDziu5QW43X6ZW 7HVsUCa6Qht63rA8i93ssjDYELNw7ZmqOoEQoH2MdoP12C80nnj+npIUICVyDitKgKBR pboA== X-Gm-Message-State: APt69E06ROlk+v1Y0qLlUog+MElj5144uC0GAGEMzdy22IYzGpdCg6PS 2+8DAIbdXEwurdlrmDO4qk2PNQ== X-Google-Smtp-Source: ADUXVKIeWLrOJZ4405U5tKz9xeiMZ8dP6DWRI/sUDhOBm6WMaXywVOvtqVmbWcTY8+0aKYlUY/ZUTQ== X-Received: by 2002:a2e:944d:: with SMTP id o13-v6mr999401ljh.65.1528364620363; Thu, 07 Jun 2018 02:43:40 -0700 (PDT) Received: from mkPC.semihalf.local (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id p28-v6sm3612368lfh.24.2018.06.07.02.43.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 07 Jun 2018 02:43:39 -0700 (PDT) From: Michal Krawczyk To: Marcin Wojtas , Michal Krawczyk , Guy Tzalik , Evgeny Schemeilin Cc: dev@dpdk.org, matua@amazon.com Date: Thu, 7 Jun 2018 11:43:04 +0200 Message-Id: <20180607094322.14312-9-mk@semihalf.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180607094322.14312-1-mk@semihalf.com> References: <20180607094322.14312-1-mk@semihalf.com> Subject: [dpdk-dev] [PATCH v3 09/27] net/ena: add reset routine X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Reset routine can be used by the DPDK application to reset the device in case of receiving RTE_ETH_EVENT_INTR_RESET from the PMD. The reset event is not triggered by the driver, yet. It will be added in next commits to enable error recovery in case of misfunctioning of the device. Signed-off-by: Michal Krawczyk --- drivers/net/ena/ena_ethdev.c | 64 +++++++++++++++++++++++++++++++++++++++++++- drivers/net/ena/ena_ethdev.h | 2 ++ 2 files changed, 65 insertions(+), 1 deletion(-) diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c index 58cf8a971..4fae4fd66 100644 --- a/drivers/net/ena/ena_ethdev.c +++ b/drivers/net/ena/ena_ethdev.c @@ -225,6 +225,7 @@ static int ena_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); static int ena_start(struct rte_eth_dev *dev); static void ena_stop(struct rte_eth_dev *dev); static void ena_close(struct rte_eth_dev *dev); +static int ena_dev_reset(struct rte_eth_dev *dev); static int ena_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats); static void ena_rx_queue_release_all(struct rte_eth_dev *dev); static void ena_tx_queue_release_all(struct rte_eth_dev *dev); @@ -262,6 +263,7 @@ static const struct eth_dev_ops ena_dev_ops = { .rx_queue_release = ena_rx_queue_release, .tx_queue_release = ena_tx_queue_release, .dev_close = ena_close, + .dev_reset = ena_dev_reset, .reta_update = ena_rss_reta_update, .reta_query = ena_rss_reta_query, }; @@ -470,6 +472,63 @@ static void ena_close(struct rte_eth_dev *dev) ena_tx_queue_release_all(dev); } +static int +ena_dev_reset(struct rte_eth_dev *dev) +{ + struct rte_mempool *mb_pool_rx[ENA_MAX_NUM_QUEUES]; + struct rte_eth_dev *eth_dev; + struct rte_pci_device *pci_dev; + struct rte_intr_handle *intr_handle; + struct ena_com_dev *ena_dev; + struct ena_com_dev_get_features_ctx get_feat_ctx; + struct ena_adapter *adapter; + int nb_queues; + int rc, i; + + adapter = (struct ena_adapter *)(dev->data->dev_private); + ena_dev = &adapter->ena_dev; + eth_dev = adapter->rte_dev; + pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); + intr_handle = &pci_dev->intr_handle; + nb_queues = eth_dev->data->nb_rx_queues; + + ena_com_set_admin_running_state(ena_dev, false); + + ena_com_dev_reset(ena_dev, adapter->reset_reason); + + for (i = 0; i < nb_queues; i++) + mb_pool_rx[i] = adapter->rx_ring[i].mb_pool; + + ena_rx_queue_release_all(eth_dev); + ena_tx_queue_release_all(eth_dev); + + rte_intr_disable(intr_handle); + + ena_com_abort_admin_commands(ena_dev); + ena_com_wait_for_abort_completion(ena_dev); + ena_com_admin_destroy(ena_dev); + ena_com_mmio_reg_read_request_destroy(ena_dev); + + rc = ena_device_init(ena_dev, &get_feat_ctx); + if (rc) { + PMD_INIT_LOG(CRIT, "Cannot initialize device\n"); + return rc; + } + + rte_intr_enable(intr_handle); + ena_com_set_admin_polling_mode(ena_dev, false); + ena_com_admin_aenq_enable(ena_dev); + + for (i = 0; i < nb_queues; ++i) + ena_rx_queue_setup(eth_dev, i, adapter->rx_ring_size, 0, NULL, + mb_pool_rx[i]); + + for (i = 0; i < nb_queues; ++i) + ena_tx_queue_setup(eth_dev, i, adapter->tx_ring_size, 0, NULL); + + return 0; +} + static int ena_rss_reta_update(struct rte_eth_dev *dev, struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size) @@ -1074,7 +1133,10 @@ static int ena_tx_queue_setup(struct rte_eth_dev *dev, for (i = 0; i < txq->ring_size; i++) txq->empty_tx_reqs[i] = i; - txq->offloads = tx_conf->offloads | dev->data->dev_conf.txmode.offloads; + if (tx_conf != NULL) { + txq->offloads = + tx_conf->offloads | dev->data->dev_conf.txmode.offloads; + } /* Store pointer to this queue in upper layer */ txq->configured = 1; diff --git a/drivers/net/ena/ena_ethdev.h b/drivers/net/ena/ena_ethdev.h index 16172a54a..79e9e655d 100644 --- a/drivers/net/ena/ena_ethdev.h +++ b/drivers/net/ena/ena_ethdev.h @@ -183,6 +183,8 @@ struct ena_adapter { uint64_t rx_selected_offloads; bool link_status; + + enum ena_regs_reset_reason_types reset_reason; }; #endif /* _ENA_ETHDEV_H_ */