diff mbox

[dpdk-dev,5/6] i40e:support GRE tunnel TX checksum offload

Message ID 1422243805-10906-6-git-send-email-jijiang.liu@intel.com (mailing list archive)
State Superseded, archived
Headers

Commit Message

Jijiang Liu Jan. 26, 2015, 3:43 a.m. UTC 
  Support NVGRE TX checksum offload, which includes
  - outer L3(IP) checksum offload
  - inner L3(IP) checksum offload
  - inner L4(UDP, TCP and SCTP) checksum offload

In addition, for GRE packet, the L4 tunnel type should be I40E_TXD_CTX_GRE_TUNNELING. 

Signed-off-by: Jijiang Liu <jijiang.liu@intel.com>
---
 lib/librte_pmd_i40e/i40e_rxtx.c |   13 ++++++++++---
 1 files changed, 10 insertions(+), 3 deletions(-)
diff mbox

Patch

diff --git a/lib/librte_pmd_i40e/i40e_rxtx.c b/lib/librte_pmd_i40e/i40e_rxtx.c
index 2beae3c..6c1e324 100644
--- a/lib/librte_pmd_i40e/i40e_rxtx.c
+++ b/lib/librte_pmd_i40e/i40e_rxtx.c
@@ -476,8 +476,15 @@  i40e_txd_enable_checksum(uint64_t ol_flags,
 		return;
 	}
 
-	/* UDP tunneling packet TX checksum offload */
-	if (unlikely(ol_flags & PKT_TX_UDP_TUNNEL_PKT)) {
+	/* UDP/GRE tunneling packet TX checksum offload */
+	if (unlikely(ol_flags & (PKT_TX_UDP_TUNNEL_PKT |
+			PKT_TX_GRE_TUNNEL_PKT))) {
+		uint32_t tunnel_flag;
+
+		if (ol_flags & PKT_TX_UDP_TUNNEL_PKT)
+			tunnel_flag = I40E_TXD_CTX_UDP_TUNNELING;
+		else
+			tunnel_flag = I40E_TXD_CTX_GRE_TUNNELING;
 
 		*td_offset |= (outer_l2_len >> 1)
 				<< I40E_TX_DESC_LENGTH_MACLEN_SHIFT;
@@ -492,7 +499,7 @@  i40e_txd_enable_checksum(uint64_t ol_flags,
 		/* Now set the ctx descriptor fields */
 		*cd_tunneling |= (outer_l3_len >> 2) <<
 				I40E_TXD_CTX_QW0_EXT_IPLEN_SHIFT |
-				I40E_TXD_CTX_UDP_TUNNELING |
+				tunnel_flag |
 				(l2_len >> 1) <<
 				I40E_TXD_CTX_QW0_NATLEN_SHIFT;