[dpdk-dev,v3] net/qede: fix advertising link speed capability

Message ID 1477938901-24999-2-git-send-email-Rasesh.Mody@cavium.com
State Accepted, archived
Headers show

Commit Message

Mody, Rasesh Oct. 31, 2016, 6:35 p.m.
From: Harish Patil <harish.patil@qlogic.com>

Fix to advertise device's link speed capability based on NVM
port configuration instead of returning driver supported speeds.

Fixes: 95e67b479506 ("net/qede: add 100G link speed capability")

Signed-off-by: Harish Patil <harish.patil@qlogic.com>
---
 drivers/net/qede/qede_ethdev.c |    6 ++++--
 drivers/net/qede/qede_ethdev.h |    1 +
 drivers/net/qede/qede_if.h     |    1 +
 drivers/net/qede/qede_main.c   |   24 ++++++++++++++++++++++++
 4 files changed, 30 insertions(+), 2 deletions(-)

Comments

Thomas Monjalon Nov. 7, 2016, 7:48 p.m. | #1
2016-10-31 11:35, Rasesh Mody:
> From: Harish Patil <harish.patil@qlogic.com>
> 
> Fix to advertise device's link speed capability based on NVM
> port configuration instead of returning driver supported speeds.
> 
> Fixes: 95e67b479506 ("net/qede: add 100G link speed capability")
> 
> Signed-off-by: Harish Patil <harish.patil@qlogic.com>
[...]
> +	/* Fill up the native advertised speed */
> +	switch (params.speed.advertised_speeds) {
> +	case NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G:
> +		adv_speed = 10000;
> +	break;
> +	case NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_25G:
> +		adv_speed = 25000;
> +	break;
> +	case NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G:
> +		adv_speed = 40000;
> +	break;
> +	case NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G:
> +		adv_speed = 50000;
> +	break;
> +	case NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_BB_100G:
> +		adv_speed = 100000;
> +	break;
> +	default:
> +		DP_NOTICE(hwfn, false, "Unknown speed\n");
> +		adv_speed = 0;
> +	}
> +	if_link->adv_speed = adv_speed;

The qede devices support only one speed?
I guess it is wrong but it is a step in right direction so it
will be enough for 16.11.

Applied
Harish Patil Nov. 10, 2016, 2:54 a.m. | #2
>

>2016-10-31 11:35, Rasesh Mody:

>> From: Harish Patil <harish.patil@qlogic.com>

>> 

>> Fix to advertise device's link speed capability based on NVM

>> port configuration instead of returning driver supported speeds.

>> 

>> Fixes: 95e67b479506 ("net/qede: add 100G link speed capability")

>> 

>> Signed-off-by: Harish Patil <harish.patil@qlogic.com>

>[...]

>> +	/* Fill up the native advertised speed */

>> +	switch (params.speed.advertised_speeds) {

>> +	case NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G:

>> +		adv_speed = 10000;

>> +	break;

>> +	case NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_25G:

>> +		adv_speed = 25000;

>> +	break;

>> +	case NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G:

>> +		adv_speed = 40000;

>> +	break;

>> +	case NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G:

>> +		adv_speed = 50000;

>> +	break;

>> +	case NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_BB_100G:

>> +		adv_speed = 100000;

>> +	break;

>> +	default:

>> +		DP_NOTICE(hwfn, false, "Unknown speed\n");

>> +		adv_speed = 0;

>> +	}

>> +	if_link->adv_speed = adv_speed;

>

>The qede devices support only one speed?

>I guess it is wrong but it is a step in right direction so it

>will be enough for 16.11.

>

>Applied

>

qede device is capable of 10, 25, 40, 50, 100Gb speeds.
It's configured at factory to have 100Gb, 50Gb, 40Gb or 25Gb speeds.
A unique PCI ID gets assigned to the device based on the speed configured.
25G device can auto-negotiate down to 10G speeds when connected to a 10G
switch.

So only for 25G case the above logic does not work correctly, for which I
have a submitted a minor fix today:
("[PATCH] net/qede: fix unknown speed errmsg for 25G link”). Pls include
it in 16.11.

Thanks,
Harish

Patch

diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index b91b478..59129f2 100644
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -646,6 +646,7 @@  qede_dev_info_get(struct rte_eth_dev *eth_dev,
 {
 	struct qede_dev *qdev = eth_dev->data->dev_private;
 	struct ecore_dev *edev = &qdev->edev;
+	struct qed_link_output link;
 
 	PMD_INIT_FUNC_TRACE(edev);
 
@@ -678,8 +679,9 @@  qede_dev_info_get(struct rte_eth_dev *eth_dev,
 				     DEV_TX_OFFLOAD_UDP_CKSUM |
 				     DEV_TX_OFFLOAD_TCP_CKSUM);
 
-	dev_info->speed_capa = ETH_LINK_SPEED_25G | ETH_LINK_SPEED_40G |
-			       ETH_LINK_SPEED_100G;
+	memset(&link, 0, sizeof(struct qed_link_output));
+	qdev->ops->common->get_link(edev, &link);
+	dev_info->speed_capa = rte_eth_speed_bitflag(link.adv_speed, 0);
 }
 
 /* return 0 means link status changed, -1 means not changed */
diff --git a/drivers/net/qede/qede_ethdev.h b/drivers/net/qede/qede_ethdev.h
index 5eb3f52..a97e3d9 100644
--- a/drivers/net/qede/qede_ethdev.h
+++ b/drivers/net/qede/qede_ethdev.h
@@ -30,6 +30,7 @@ 
 #include "base/ecore_dev_api.h"
 #include "base/ecore_iov_api.h"
 #include "base/ecore_cxt.h"
+#include "base/nvm_cfg.h"
 
 #include "qede_logs.h"
 #include "qede_if.h"
diff --git a/drivers/net/qede/qede_if.h b/drivers/net/qede/qede_if.h
index 2d38b1b..4936349 100644
--- a/drivers/net/qede/qede_if.h
+++ b/drivers/net/qede/qede_if.h
@@ -70,6 +70,7 @@  struct qed_link_output {
 	uint32_t advertised_caps;	/* In ADVERTISED defs */
 	uint32_t lp_caps;	/* In ADVERTISED defs */
 	uint32_t speed;		/* In Mb/s */
+	uint32_t adv_speed;	/* In Mb/s */
 	uint8_t duplex;		/* In DUPLEX defs */
 	uint8_t port;		/* In PORT defs */
 	bool autoneg;
diff --git a/drivers/net/qede/qede_main.c b/drivers/net/qede/qede_main.c
index 2d354e1..d2e476c 100644
--- a/drivers/net/qede/qede_main.c
+++ b/drivers/net/qede/qede_main.c
@@ -488,6 +488,7 @@  static void qed_fill_link(struct ecore_hwfn *hwfn,
 	struct ecore_mcp_link_state link;
 	struct ecore_mcp_link_capabilities link_caps;
 	uint32_t media_type;
+	uint32_t adv_speed;
 	uint8_t change = 0;
 
 	memset(if_link, 0, sizeof(*if_link));
@@ -515,6 +516,29 @@  static void qed_fill_link(struct ecore_hwfn *hwfn,
 
 	if_link->duplex = QEDE_DUPLEX_FULL;
 
+	/* Fill up the native advertised speed */
+	switch (params.speed.advertised_speeds) {
+	case NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G:
+		adv_speed = 10000;
+	break;
+	case NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_25G:
+		adv_speed = 25000;
+	break;
+	case NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G:
+		adv_speed = 40000;
+	break;
+	case NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G:
+		adv_speed = 50000;
+	break;
+	case NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_BB_100G:
+		adv_speed = 100000;
+	break;
+	default:
+		DP_NOTICE(hwfn, false, "Unknown speed\n");
+		adv_speed = 0;
+	}
+	if_link->adv_speed = adv_speed;
+
 	if (params.speed.autoneg)
 		if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG;