[dpdk-dev] drivers/i40e: fix the hash filter invalid calculation in X722

Message ID 1474887098-115474-1-git-send-email-jia.guo@intel.com
State Superseded, archived
Delegated to: Bruce Richardson
Headers show

Commit Message

Jeff Guo Sept. 26, 2016, 10:51 a.m.
As X722 extracts IPv4 header to Field Vector different with XL710/X710,
need to corresponding to modify the fields of IPv4 header in input set
to map different default Field Vector Table of different nics.

Signed-off-by: Jeff Guo <jia.guo@intel.com>
---
 drivers/net/i40e/i40e_ethdev.c | 77 +++++++++++++++++++++++++++++++++++++++---
 1 file changed, 73 insertions(+), 4 deletions(-)

Comments

Wu, Jingjing Sept. 29, 2016, 6:29 a.m. | #1
> -----Original Message-----
> From: Guo, Jia
> Sent: Monday, September 26, 2016 6:52 PM
> To: Zhang, Helin; Wu, Jingjing
> Cc: dev@dpdk.org; Guo, Jia
> Subject: [PATCH] drivers/i40e: fix the hash filter invalid calculation in X722
> 
> As X722 extracts IPv4 header to Field Vector different with XL710/X710, need
> to corresponding to modify the fields of IPv4 header in input set to map
> different default Field Vector Table of different nics.
> 
> Signed-off-by: Jeff Guo <jia.guo@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Ferruh Yigit Sept. 29, 2016, 6:15 p.m. | #2
On 9/26/2016 11:51 AM, Jeff Guo wrote:
> As X722 extracts IPv4 header to Field Vector different with XL710/X710,
> need to corresponding to modify the fields of IPv4 header in input set
> to map different default Field Vector Table of different nics.
> 
> Signed-off-by: Jeff Guo <jia.guo@intel.com>
> ---
>  drivers/net/i40e/i40e_ethdev.c | 77 +++++++++++++++++++++++++++++++++++++++---
>  1 file changed, 73 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
> index b04c833..9b4c71f 100644
> --- a/drivers/net/i40e/i40e_ethdev.c
> +++ b/drivers/net/i40e/i40e_ethdev.c
> @@ -211,6 +211,18 @@
>  #define I40E_REG_INSET_L3_SRC_IP4                0x0001800000000000ULL
>  /* Destination IPv4 address */
>  #define I40E_REG_INSET_L3_DST_IP4                0x0000001800000000ULL
> +#ifdef X722_SUPPORT
> +/* Source IPv4 address for X722 */
> +#define I40E_X722_REG_INSET_L3_SRC_IP4           0x0006000000000000ULL

These macros defined here within "#ifdef X722_SUPPORT" and later used
unconditionally, this will cause a compile error when "X722_SUPPORT" not
defined.

> +/* Destination IPv4 address for X722 */
> +#define I40E_X722_REG_INSET_L3_DST_IP4           0x0000060000000000ULL
> +/* IPv4 Type of Service (TOS) */
> +#define I40E_X722_REG_INSET_L3_IP4_TOS           0x0040000000000000ULL

This value seems same as I40E_REG_INSET_L3_IP4_TOS, why creating a X722
version of this?

> +/* IPv4 Protocol */
> +#define I40E_X722_REG_INSET_L3_IP4_PROTO         0x0010000000000000ULL
> +/* IPv4 Time to Live */
> +#define I40E_X722_REG_INSET_L3_IP4_TTL           0x0010000000000000ULL
> +#endif
>  /* IPv4 Type of Service (TOS) */
>  #define I40E_REG_INSET_L3_IP4_TOS                0x0040000000000000ULL
>  /* IPv4 Protocol */
> @@ -7372,7 +7384,7 @@ i40e_parse_input_set(uint64_t *inset,
>   * and vice versa
>   */
>  static uint64_t
> -i40e_translate_input_set_reg(uint64_t input)
> +i40e_translate_input_set_reg(enum i40e_mac_type type, uint64_t input)
>  {
>  	uint64_t val = 0;
>  	uint16_t i;
> @@ -7419,14 +7431,70 @@ i40e_translate_input_set_reg(uint64_t input)
>  		{I40E_INSET_FLEX_PAYLOAD_W8, I40E_REG_INSET_FLEX_PAYLOAD_WORD8},
>  	};
>  
> +	static const struct {
> +		uint64_t inset;
> +		uint64_t inset_reg;

Since creating second instance of this struct, why not extract strcut
declaration?

> +	} inset_map1[] = {

Is it possible to use more descriptive variable name, hard to
distinguish diff between inset_map and inset_map1.

> +		{I40E_INSET_DMAC, I40E_REG_INSET_L2_DMAC},
> +		{I40E_INSET_SMAC, I40E_REG_INSET_L2_SMAC},
> +		{I40E_INSET_VLAN_OUTER, I40E_REG_INSET_L2_OUTER_VLAN},
> +		{I40E_INSET_VLAN_INNER, I40E_REG_INSET_L2_INNER_VLAN},
> +		{I40E_INSET_LAST_ETHER_TYPE, I40E_REG_INSET_LAST_ETHER_TYPE},

---->
> +		{I40E_INSET_IPV4_SRC, I40E_X722_REG_INSET_L3_SRC_IP4},
> +		{I40E_INSET_IPV4_DST, I40E_X722_REG_INSET_L3_DST_IP4},
> +		{I40E_INSET_IPV4_TOS, I40E_X722_REG_INSET_L3_IP4_TOS},
> +		{I40E_INSET_IPV4_PROTO, I40E_X722_REG_INSET_L3_IP4_PROTO},
> +		{I40E_INSET_IPV4_TTL, I40E_X722_REG_INSET_L3_IP4_TTL},
<----
Since limited number of values are different from inset_map[], and most
of them are duplication, is it possible to prevent duplication?

> +		{I40E_INSET_IPV6_SRC, I40E_REG_INSET_L3_SRC_IP6},
> +		{I40E_INSET_IPV6_DST, I40E_REG_INSET_L3_DST_IP6},
> +		{I40E_INSET_IPV6_TC, I40E_REG_INSET_L3_IP6_TC},
> +		{I40E_INSET_IPV6_NEXT_HDR, I40E_REG_INSET_L3_IP6_NEXT_HDR},
> +		{I40E_INSET_IPV6_HOP_LIMIT, I40E_REG_INSET_L3_IP6_HOP_LIMIT},
> +		{I40E_INSET_SRC_PORT, I40E_REG_INSET_L4_SRC_PORT},
> +		{I40E_INSET_DST_PORT, I40E_REG_INSET_L4_DST_PORT},
> +		{I40E_INSET_SCTP_VT, I40E_REG_INSET_L4_SCTP_VERIFICATION_TAG},
> +		{I40E_INSET_TUNNEL_ID, I40E_REG_INSET_TUNNEL_ID},
> +		{I40E_INSET_TUNNEL_DMAC,
> +			I40E_REG_INSET_TUNNEL_L2_INNER_DST_MAC},
> +		{I40E_INSET_TUNNEL_IPV4_DST, I40E_REG_INSET_TUNNEL_L3_DST_IP4},
> +		{I40E_INSET_TUNNEL_IPV6_DST, I40E_REG_INSET_TUNNEL_L3_DST_IP6},
> +		{I40E_INSET_TUNNEL_SRC_PORT,
> +			I40E_REG_INSET_TUNNEL_L4_UDP_SRC_PORT},
> +		{I40E_INSET_TUNNEL_DST_PORT,
> +			I40E_REG_INSET_TUNNEL_L4_UDP_DST_PORT},
> +		{I40E_INSET_VLAN_TUNNEL, I40E_REG_INSET_TUNNEL_VLAN},
> +		{I40E_INSET_FLEX_PAYLOAD_W1, I40E_REG_INSET_FLEX_PAYLOAD_WORD1},
> +		{I40E_INSET_FLEX_PAYLOAD_W2, I40E_REG_INSET_FLEX_PAYLOAD_WORD2},
> +		{I40E_INSET_FLEX_PAYLOAD_W3, I40E_REG_INSET_FLEX_PAYLOAD_WORD3},
> +		{I40E_INSET_FLEX_PAYLOAD_W4, I40E_REG_INSET_FLEX_PAYLOAD_WORD4},
> +		{I40E_INSET_FLEX_PAYLOAD_W5, I40E_REG_INSET_FLEX_PAYLOAD_WORD5},
> +		{I40E_INSET_FLEX_PAYLOAD_W6, I40E_REG_INSET_FLEX_PAYLOAD_WORD6},
> +		{I40E_INSET_FLEX_PAYLOAD_W7, I40E_REG_INSET_FLEX_PAYLOAD_WORD7},
> +		{I40E_INSET_FLEX_PAYLOAD_W8, I40E_REG_INSET_FLEX_PAYLOAD_WORD8},
> +	};
> +
>  	if (input == 0)
>  		return val;
>  
>  	/* Translate input set to register aware inset */
> +#ifdef X722_SUPPORT
> +	if (type == I40E_MAC_X722) {
> +		for (i = 0; i < RTE_DIM(inset_map1); i++) {
> +			if (input & inset_map1[i].inset)
> +				val |= inset_map1[i].inset_reg;
> +		}
> +	} else {
> +		for (i = 0; i < RTE_DIM(inset_map); i++) {
> +			if (input & inset_map[i].inset)
> +				val |= inset_map[i].inset_reg;
> +		}
> +	}
> +#else
>  	for (i = 0; i < RTE_DIM(inset_map); i++) {
>  		if (input & inset_map[i].inset)
>  			val |= inset_map[i].inset_reg;
>  	}
> +#endif

What about something like this, to prevent duplication:

inset_map_x = inset_map;

#ifdef X722_SUPPORT
if (type == I40E_MAC_X722)
	inset_map_x = inset_map1;
#endif

for (i = 0; i < RTE_DIM(inset_map_x); i++) {
	if (input & inset_map_x[i].inset)
		val |= inset_map_x[i].inset_reg;
}



>  
>  	return val;
>  }
> @@ -7510,7 +7578,8 @@ i40e_filter_input_set_init(struct i40e_pf *pf)
>  						   I40E_INSET_MASK_NUM_REG);
>  		if (num < 0)
>  			return;
> -		inset_reg = i40e_translate_input_set_reg(input_set);
> +		inset_reg = i40e_translate_input_set_reg(hw->mac.type,
> +					input_set);
>  
>  		i40e_check_write_reg(hw, I40E_PRTQF_FD_INSET(pctype, 0),
>  				      (uint32_t)(inset_reg & UINT32_MAX));
> @@ -7592,7 +7661,7 @@ i40e_hash_filter_inset_select(struct i40e_hw *hw,
>  	if (num < 0)
>  		return -EINVAL;
>  
> -	inset_reg |= i40e_translate_input_set_reg(input_set);
> +	inset_reg |= i40e_translate_input_set_reg(hw->mac.type, input_set);
>  
>  	i40e_check_write_reg(hw, I40E_GLQF_HASH_INSET(0, pctype),
>  			      (uint32_t)(inset_reg & UINT32_MAX));
> @@ -7668,7 +7737,7 @@ i40e_fdir_filter_inset_select(struct i40e_pf *pf,
>  	if (num < 0)
>  		return -EINVAL;
>  
> -	inset_reg |= i40e_translate_input_set_reg(input_set);
> +	inset_reg |= i40e_translate_input_set_reg(hw->mac.type, input_set);
>  
>  	i40e_check_write_reg(hw, I40E_PRTQF_FD_INSET(pctype, 0),
>  			      (uint32_t)(inset_reg & UINT32_MAX));
>
Wu, Jingjing Sept. 30, 2016, 6:05 a.m. | #3
> -----Original Message-----
> From: Yigit, Ferruh
> Sent: Friday, September 30, 2016 2:16 AM
> To: Guo, Jia; Zhang, Helin; Wu, Jingjing
> Cc: dev@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH] drivers/i40e: fix the hash filter invalid
> calculation in X722
> 
> On 9/26/2016 11:51 AM, Jeff Guo wrote:
> > As X722 extracts IPv4 header to Field Vector different with
> > XL710/X710, need to corresponding to modify the fields of IPv4 header
> > in input set to map different default Field Vector Table of different nics.
> >
> > Signed-off-by: Jeff Guo <jia.guo@intel.com>
> > ---
> >  drivers/net/i40e/i40e_ethdev.c | 77
> > +++++++++++++++++++++++++++++++++++++++---
> >  1 file changed, 73 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/net/i40e/i40e_ethdev.c
> > b/drivers/net/i40e/i40e_ethdev.c index b04c833..9b4c71f 100644
> > --- a/drivers/net/i40e/i40e_ethdev.c
> > +++ b/drivers/net/i40e/i40e_ethdev.c
> > @@ -211,6 +211,18 @@
> >  #define I40E_REG_INSET_L3_SRC_IP4                0x0001800000000000ULL
> >  /* Destination IPv4 address */
> >  #define I40E_REG_INSET_L3_DST_IP4                0x0000001800000000ULL
> > +#ifdef X722_SUPPORT
> > +/* Source IPv4 address for X722 */
> > +#define I40E_X722_REG_INSET_L3_SRC_IP4           0x0006000000000000ULL
> 
> These macros defined here within "#ifdef X722_SUPPORT" and later used
> unconditionally, this will cause a compile error when "X722_SUPPORT" not
> defined.
These macros defined are used in condition later. Maybe the compile error
Already exist in current driver. We need to check that and fix this. 
> 
> > +/* Destination IPv4 address for X722 */
> > +#define I40E_X722_REG_INSET_L3_DST_IP4           0x0000060000000000ULL
> > +/* IPv4 Type of Service (TOS) */
> > +#define I40E_X722_REG_INSET_L3_IP4_TOS           0x0040000000000000ULL
> 
> This value seems same as I40E_REG_INSET_L3_IP4_TOS, why creating a X722
> version of this?
> 
> > +/* IPv4 Protocol */
> > +#define I40E_X722_REG_INSET_L3_IP4_PROTO
> 0x0010000000000000ULL
> > +/* IPv4 Time to Live */
> > +#define I40E_X722_REG_INSET_L3_IP4_TTL           0x0010000000000000ULL
> > +#endif
> >  /* IPv4 Type of Service (TOS) */
> >  #define I40E_REG_INSET_L3_IP4_TOS                0x0040000000000000ULL
> >  /* IPv4 Protocol */
> > @@ -7372,7 +7384,7 @@ i40e_parse_input_set(uint64_t *inset,
> >   * and vice versa
> >   */
> >  static uint64_t
> > -i40e_translate_input_set_reg(uint64_t input)
> > +i40e_translate_input_set_reg(enum i40e_mac_type type, uint64_t input)
> >  {
> >  	uint64_t val = 0;
> >  	uint16_t i;
> > @@ -7419,14 +7431,70 @@ i40e_translate_input_set_reg(uint64_t input)
> >  		{I40E_INSET_FLEX_PAYLOAD_W8,
> I40E_REG_INSET_FLEX_PAYLOAD_WORD8},
> >  	};
> >
> > +	static const struct {
> > +		uint64_t inset;
> > +		uint64_t inset_reg;
> 
> Since creating second instance of this struct, why not extract strcut
> declaration?
> 
> > +	} inset_map1[] = {
> 
> Is it possible to use more descriptive variable name, hard to distinguish diff
> between inset_map and inset_map1.
> 
> > +		{I40E_INSET_DMAC, I40E_REG_INSET_L2_DMAC},
> > +		{I40E_INSET_SMAC, I40E_REG_INSET_L2_SMAC},
> > +		{I40E_INSET_VLAN_OUTER,
> I40E_REG_INSET_L2_OUTER_VLAN},
> > +		{I40E_INSET_VLAN_INNER,
> I40E_REG_INSET_L2_INNER_VLAN},
> > +		{I40E_INSET_LAST_ETHER_TYPE,
> I40E_REG_INSET_LAST_ETHER_TYPE},
> 
> ---->
> > +		{I40E_INSET_IPV4_SRC, I40E_X722_REG_INSET_L3_SRC_IP4},
> > +		{I40E_INSET_IPV4_DST, I40E_X722_REG_INSET_L3_DST_IP4},
> > +		{I40E_INSET_IPV4_TOS, I40E_X722_REG_INSET_L3_IP4_TOS},
> > +		{I40E_INSET_IPV4_PROTO,
> I40E_X722_REG_INSET_L3_IP4_PROTO},
> > +		{I40E_INSET_IPV4_TTL, I40E_X722_REG_INSET_L3_IP4_TTL},
> <----
> Since limited number of values are different from inset_map[], and most of
> them are duplication, is it possible to prevent duplication?
Didn't find and proposal on that. Because we need to support
I40E_X722_REG_INSET_XX and I40E_REG_INSET_XX at the same time. So it
Cannot be achieved by #ifdef and #endif.
> 
> > +		{I40E_INSET_IPV6_SRC, I40E_REG_INSET_L3_SRC_IP6},
> > +		{I40E_INSET_IPV6_DST, I40E_REG_INSET_L3_DST_IP6},
> > +		{I40E_INSET_IPV6_TC, I40E_REG_INSET_L3_IP6_TC},
> > +		{I40E_INSET_IPV6_NEXT_HDR,
> I40E_REG_INSET_L3_IP6_NEXT_HDR},
> > +		{I40E_INSET_IPV6_HOP_LIMIT,
> I40E_REG_INSET_L3_IP6_HOP_LIMIT},
> > +		{I40E_INSET_SRC_PORT, I40E_REG_INSET_L4_SRC_PORT},
> > +		{I40E_INSET_DST_PORT, I40E_REG_INSET_L4_DST_PORT},
> > +		{I40E_INSET_SCTP_VT,
> I40E_REG_INSET_L4_SCTP_VERIFICATION_TAG},
> > +		{I40E_INSET_TUNNEL_ID, I40E_REG_INSET_TUNNEL_ID},
> > +		{I40E_INSET_TUNNEL_DMAC,
> > +			I40E_REG_INSET_TUNNEL_L2_INNER_DST_MAC},
> > +		{I40E_INSET_TUNNEL_IPV4_DST,
> I40E_REG_INSET_TUNNEL_L3_DST_IP4},
> > +		{I40E_INSET_TUNNEL_IPV6_DST,
> I40E_REG_INSET_TUNNEL_L3_DST_IP6},
> > +		{I40E_INSET_TUNNEL_SRC_PORT,
> > +			I40E_REG_INSET_TUNNEL_L4_UDP_SRC_PORT},
> > +		{I40E_INSET_TUNNEL_DST_PORT,
> > +			I40E_REG_INSET_TUNNEL_L4_UDP_DST_PORT},
> > +		{I40E_INSET_VLAN_TUNNEL,
> I40E_REG_INSET_TUNNEL_VLAN},
> > +		{I40E_INSET_FLEX_PAYLOAD_W1,
> I40E_REG_INSET_FLEX_PAYLOAD_WORD1},
> > +		{I40E_INSET_FLEX_PAYLOAD_W2,
> I40E_REG_INSET_FLEX_PAYLOAD_WORD2},
> > +		{I40E_INSET_FLEX_PAYLOAD_W3,
> I40E_REG_INSET_FLEX_PAYLOAD_WORD3},
> > +		{I40E_INSET_FLEX_PAYLOAD_W4,
> I40E_REG_INSET_FLEX_PAYLOAD_WORD4},
> > +		{I40E_INSET_FLEX_PAYLOAD_W5,
> I40E_REG_INSET_FLEX_PAYLOAD_WORD5},
> > +		{I40E_INSET_FLEX_PAYLOAD_W6,
> I40E_REG_INSET_FLEX_PAYLOAD_WORD6},
> > +		{I40E_INSET_FLEX_PAYLOAD_W7,
> I40E_REG_INSET_FLEX_PAYLOAD_WORD7},
> > +		{I40E_INSET_FLEX_PAYLOAD_W8,
> I40E_REG_INSET_FLEX_PAYLOAD_WORD8},
> > +	};
> > +
> >  	if (input == 0)
> >  		return val;
> >
> >  	/* Translate input set to register aware inset */
> > +#ifdef X722_SUPPORT
> > +	if (type == I40E_MAC_X722) {
> > +		for (i = 0; i < RTE_DIM(inset_map1); i++) {
> > +			if (input & inset_map1[i].inset)
> > +				val |= inset_map1[i].inset_reg;
> > +		}
> > +	} else {
> > +		for (i = 0; i < RTE_DIM(inset_map); i++) {
> > +			if (input & inset_map[i].inset)
> > +				val |= inset_map[i].inset_reg;
> > +		}
> > +	}
> > +#else
> >  	for (i = 0; i < RTE_DIM(inset_map); i++) {
> >  		if (input & inset_map[i].inset)
> >  			val |= inset_map[i].inset_reg;
> >  	}
> > +#endif
> 
> What about something like this, to prevent duplication:
> 
> inset_map_x = inset_map;
> 
> #ifdef X722_SUPPORT
> if (type == I40E_MAC_X722)
> 	inset_map_x = inset_map1;
> #endif
> 
> for (i = 0; i < RTE_DIM(inset_map_x); i++) {
> 	if (input & inset_map_x[i].inset)
> 		val |= inset_map_x[i].inset_reg;
> }
> 
Also thought about that way, but if X722_SUPPORT is not set
Compile error will report because of unused parameter.

Thanks
Jingjing
Ferruh Yigit Sept. 30, 2016, 9:09 a.m. | #4
Hi Jingjing,

On 9/30/2016 7:05 AM, Wu, Jingjing wrote:
> 
> 
>> -----Original Message-----
>> From: Yigit, Ferruh
>> Sent: Friday, September 30, 2016 2:16 AM
>> To: Guo, Jia; Zhang, Helin; Wu, Jingjing
>> Cc: dev@dpdk.org
>> Subject: Re: [dpdk-dev] [PATCH] drivers/i40e: fix the hash filter invalid
>> calculation in X722
>>
>> On 9/26/2016 11:51 AM, Jeff Guo wrote:
>>> As X722 extracts IPv4 header to Field Vector different with
>>> XL710/X710, need to corresponding to modify the fields of IPv4 header
>>> in input set to map different default Field Vector Table of different nics.
>>>
>>> Signed-off-by: Jeff Guo <jia.guo@intel.com>

<...>

>>> +#ifdef X722_SUPPORT
>>> +/* Source IPv4 address for X722 */
>>> +#define I40E_X722_REG_INSET_L3_SRC_IP4           0x0006000000000000ULL
>>
>> These macros defined here within "#ifdef X722_SUPPORT" and later used
>> unconditionally, this will cause a compile error when "X722_SUPPORT" not
>> defined.
> These macros defined are used in condition later. 

No they are not used in condition, please check that macros have been
used in inset_map1[] without an ifdef.

> Maybe the compile error
> Already exist in current driver. We need to check that and fix this.

And yes compile error already exist in driver! but lets not add a new ones.

>>
>>> +/* Destination IPv4 address for X722 */
>>> +#define I40E_X722_REG_INSET_L3_DST_IP4           0x0000060000000000ULL
>>> +/* IPv4 Type of Service (TOS) */
>>> +#define I40E_X722_REG_INSET_L3_IP4_TOS           0x0040000000000000ULL
>>
>> This value seems same as I40E_REG_INSET_L3_IP4_TOS, why creating a X722
>> version of this?
>>
>>> +/* IPv4 Protocol */
>>> +#define I40E_X722_REG_INSET_L3_IP4_PROTO
>> 0x0010000000000000ULL
>>> +/* IPv4 Time to Live */
>>> +#define I40E_X722_REG_INSET_L3_IP4_TTL           0x0010000000000000ULL
>>> +#endif

Overall, these new values seems like not conflicting with existing
values, can you please confirm that, if this is the case why not define
these values without ifdef?

<...>

>>
>> ---->
>>> +		{I40E_INSET_IPV4_SRC, I40E_X722_REG_INSET_L3_SRC_IP4},
>>> +		{I40E_INSET_IPV4_DST, I40E_X722_REG_INSET_L3_DST_IP4},
>>> +		{I40E_INSET_IPV4_TOS, I40E_X722_REG_INSET_L3_IP4_TOS},
>>> +		{I40E_INSET_IPV4_PROTO,
>> I40E_X722_REG_INSET_L3_IP4_PROTO},
>>> +		{I40E_INSET_IPV4_TTL, I40E_X722_REG_INSET_L3_IP4_TTL},
>> <----
>> Since limited number of values are different from inset_map[], and most of
>> them are duplication, is it possible to prevent duplication?
> Didn't find and proposal on that. Because we need to support
> I40E_X722_REG_INSET_XX and I40E_REG_INSET_XX at the same time. So it
> Cannot be achieved by #ifdef and #endif.

It doesn't have to be with #ifdef #endif, whole array duplicated for 5
changes, there must be a way to remove duplication. First thing I can
think of is extracting common part into a new array?

<...>

>>>  	/* Translate input set to register aware inset */
>>> +#ifdef X722_SUPPORT
>>> +	if (type == I40E_MAC_X722) {
>>> +		for (i = 0; i < RTE_DIM(inset_map1); i++) {
>>> +			if (input & inset_map1[i].inset)
>>> +				val |= inset_map1[i].inset_reg;
>>> +		}
>>> +	} else {
>>> +		for (i = 0; i < RTE_DIM(inset_map); i++) {
>>> +			if (input & inset_map[i].inset)
>>> +				val |= inset_map[i].inset_reg;
>>> +		}
>>> +	}
>>> +#else
>>>  	for (i = 0; i < RTE_DIM(inset_map); i++) {
>>>  		if (input & inset_map[i].inset)
>>>  			val |= inset_map[i].inset_reg;
>>>  	}
>>> +#endif
>>
>> What about something like this, to prevent duplication:
>>
>> inset_map_x = inset_map;
>>
>> #ifdef X722_SUPPORT
>> if (type == I40E_MAC_X722)
>> 	inset_map_x = inset_map1;
>> #endif
>>
>> for (i = 0; i < RTE_DIM(inset_map_x); i++) {
>> 	if (input & inset_map_x[i].inset)
>> 		val |= inset_map_x[i].inset_reg;
>> }
>>
> Also thought about that way, but if X722_SUPPORT is not set
> Compile error will report because of unused parameter.

I believe there won't be a unused parameter warning for above suggestion
but the intention here is to simplify the logic, which I think can be
done, it doesn't have to be like suggested way.

Patch

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index b04c833..9b4c71f 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -211,6 +211,18 @@ 
 #define I40E_REG_INSET_L3_SRC_IP4                0x0001800000000000ULL
 /* Destination IPv4 address */
 #define I40E_REG_INSET_L3_DST_IP4                0x0000001800000000ULL
+#ifdef X722_SUPPORT
+/* Source IPv4 address for X722 */
+#define I40E_X722_REG_INSET_L3_SRC_IP4           0x0006000000000000ULL
+/* Destination IPv4 address for X722 */
+#define I40E_X722_REG_INSET_L3_DST_IP4           0x0000060000000000ULL
+/* IPv4 Type of Service (TOS) */
+#define I40E_X722_REG_INSET_L3_IP4_TOS           0x0040000000000000ULL
+/* IPv4 Protocol */
+#define I40E_X722_REG_INSET_L3_IP4_PROTO         0x0010000000000000ULL
+/* IPv4 Time to Live */
+#define I40E_X722_REG_INSET_L3_IP4_TTL           0x0010000000000000ULL
+#endif
 /* IPv4 Type of Service (TOS) */
 #define I40E_REG_INSET_L3_IP4_TOS                0x0040000000000000ULL
 /* IPv4 Protocol */
@@ -7372,7 +7384,7 @@  i40e_parse_input_set(uint64_t *inset,
  * and vice versa
  */
 static uint64_t
-i40e_translate_input_set_reg(uint64_t input)
+i40e_translate_input_set_reg(enum i40e_mac_type type, uint64_t input)
 {
 	uint64_t val = 0;
 	uint16_t i;
@@ -7419,14 +7431,70 @@  i40e_translate_input_set_reg(uint64_t input)
 		{I40E_INSET_FLEX_PAYLOAD_W8, I40E_REG_INSET_FLEX_PAYLOAD_WORD8},
 	};
 
+	static const struct {
+		uint64_t inset;
+		uint64_t inset_reg;
+	} inset_map1[] = {
+		{I40E_INSET_DMAC, I40E_REG_INSET_L2_DMAC},
+		{I40E_INSET_SMAC, I40E_REG_INSET_L2_SMAC},
+		{I40E_INSET_VLAN_OUTER, I40E_REG_INSET_L2_OUTER_VLAN},
+		{I40E_INSET_VLAN_INNER, I40E_REG_INSET_L2_INNER_VLAN},
+		{I40E_INSET_LAST_ETHER_TYPE, I40E_REG_INSET_LAST_ETHER_TYPE},
+		{I40E_INSET_IPV4_SRC, I40E_X722_REG_INSET_L3_SRC_IP4},
+		{I40E_INSET_IPV4_DST, I40E_X722_REG_INSET_L3_DST_IP4},
+		{I40E_INSET_IPV4_TOS, I40E_X722_REG_INSET_L3_IP4_TOS},
+		{I40E_INSET_IPV4_PROTO, I40E_X722_REG_INSET_L3_IP4_PROTO},
+		{I40E_INSET_IPV4_TTL, I40E_X722_REG_INSET_L3_IP4_TTL},
+		{I40E_INSET_IPV6_SRC, I40E_REG_INSET_L3_SRC_IP6},
+		{I40E_INSET_IPV6_DST, I40E_REG_INSET_L3_DST_IP6},
+		{I40E_INSET_IPV6_TC, I40E_REG_INSET_L3_IP6_TC},
+		{I40E_INSET_IPV6_NEXT_HDR, I40E_REG_INSET_L3_IP6_NEXT_HDR},
+		{I40E_INSET_IPV6_HOP_LIMIT, I40E_REG_INSET_L3_IP6_HOP_LIMIT},
+		{I40E_INSET_SRC_PORT, I40E_REG_INSET_L4_SRC_PORT},
+		{I40E_INSET_DST_PORT, I40E_REG_INSET_L4_DST_PORT},
+		{I40E_INSET_SCTP_VT, I40E_REG_INSET_L4_SCTP_VERIFICATION_TAG},
+		{I40E_INSET_TUNNEL_ID, I40E_REG_INSET_TUNNEL_ID},
+		{I40E_INSET_TUNNEL_DMAC,
+			I40E_REG_INSET_TUNNEL_L2_INNER_DST_MAC},
+		{I40E_INSET_TUNNEL_IPV4_DST, I40E_REG_INSET_TUNNEL_L3_DST_IP4},
+		{I40E_INSET_TUNNEL_IPV6_DST, I40E_REG_INSET_TUNNEL_L3_DST_IP6},
+		{I40E_INSET_TUNNEL_SRC_PORT,
+			I40E_REG_INSET_TUNNEL_L4_UDP_SRC_PORT},
+		{I40E_INSET_TUNNEL_DST_PORT,
+			I40E_REG_INSET_TUNNEL_L4_UDP_DST_PORT},
+		{I40E_INSET_VLAN_TUNNEL, I40E_REG_INSET_TUNNEL_VLAN},
+		{I40E_INSET_FLEX_PAYLOAD_W1, I40E_REG_INSET_FLEX_PAYLOAD_WORD1},
+		{I40E_INSET_FLEX_PAYLOAD_W2, I40E_REG_INSET_FLEX_PAYLOAD_WORD2},
+		{I40E_INSET_FLEX_PAYLOAD_W3, I40E_REG_INSET_FLEX_PAYLOAD_WORD3},
+		{I40E_INSET_FLEX_PAYLOAD_W4, I40E_REG_INSET_FLEX_PAYLOAD_WORD4},
+		{I40E_INSET_FLEX_PAYLOAD_W5, I40E_REG_INSET_FLEX_PAYLOAD_WORD5},
+		{I40E_INSET_FLEX_PAYLOAD_W6, I40E_REG_INSET_FLEX_PAYLOAD_WORD6},
+		{I40E_INSET_FLEX_PAYLOAD_W7, I40E_REG_INSET_FLEX_PAYLOAD_WORD7},
+		{I40E_INSET_FLEX_PAYLOAD_W8, I40E_REG_INSET_FLEX_PAYLOAD_WORD8},
+	};
+
 	if (input == 0)
 		return val;
 
 	/* Translate input set to register aware inset */
+#ifdef X722_SUPPORT
+	if (type == I40E_MAC_X722) {
+		for (i = 0; i < RTE_DIM(inset_map1); i++) {
+			if (input & inset_map1[i].inset)
+				val |= inset_map1[i].inset_reg;
+		}
+	} else {
+		for (i = 0; i < RTE_DIM(inset_map); i++) {
+			if (input & inset_map[i].inset)
+				val |= inset_map[i].inset_reg;
+		}
+	}
+#else
 	for (i = 0; i < RTE_DIM(inset_map); i++) {
 		if (input & inset_map[i].inset)
 			val |= inset_map[i].inset_reg;
 	}
+#endif
 
 	return val;
 }
@@ -7510,7 +7578,8 @@  i40e_filter_input_set_init(struct i40e_pf *pf)
 						   I40E_INSET_MASK_NUM_REG);
 		if (num < 0)
 			return;
-		inset_reg = i40e_translate_input_set_reg(input_set);
+		inset_reg = i40e_translate_input_set_reg(hw->mac.type,
+					input_set);
 
 		i40e_check_write_reg(hw, I40E_PRTQF_FD_INSET(pctype, 0),
 				      (uint32_t)(inset_reg & UINT32_MAX));
@@ -7592,7 +7661,7 @@  i40e_hash_filter_inset_select(struct i40e_hw *hw,
 	if (num < 0)
 		return -EINVAL;
 
-	inset_reg |= i40e_translate_input_set_reg(input_set);
+	inset_reg |= i40e_translate_input_set_reg(hw->mac.type, input_set);
 
 	i40e_check_write_reg(hw, I40E_GLQF_HASH_INSET(0, pctype),
 			      (uint32_t)(inset_reg & UINT32_MAX));
@@ -7668,7 +7737,7 @@  i40e_fdir_filter_inset_select(struct i40e_pf *pf,
 	if (num < 0)
 		return -EINVAL;
 
-	inset_reg |= i40e_translate_input_set_reg(input_set);
+	inset_reg |= i40e_translate_input_set_reg(hw->mac.type, input_set);
 
 	i40e_check_write_reg(hw, I40E_PRTQF_FD_INSET(pctype, 0),
 			      (uint32_t)(inset_reg & UINT32_MAX));